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參數(shù)資料
| 型號： | CAT25C08X |
| 英文描述： | Supervisory Circuits with SPI Serial E2PROM, Precision Reset Controller and Watchdog Timer |
| 中文描述： | 監(jiān)控電路具有SPI串行E2PROM，精密復位控制器和看門狗定時器 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 160K |
| 代理商： | CAT25C08X |
9-102
CAT25CXXX
Stock No. 21085-01 4/98
Advanced
Byte Write
Once the device is in a Write Enable state, the user may
proceed with a write sequence by setting the
CS
low,
issuing a write instruction via the SI line, followed by the
16-bit address for 25C08X/16X/32X (only 10-bit ad-
dresses are used for 25C08X, 11-bit addresses are
used for 25C16X, and 12-bit addresses are used for
25C32X. The rest of the bits are don't care bits) and 8-
bit address for 25C02X/04X (for the 25C04X, bit 3 of the
read data instruction contains address A8). Program-
ming will start after the
CS
is brought high. The low to
high transition of the
CS
pin must occur during the SCK
low time, immediately after clocking the least significant
bit of the data. Figure 6 illustrates byte write sequence.
During an internal write cycle, all commands will be
ignored except the RDSR (Read Status Register) in-
struction.
The Status Register can be read to determine if the write
cycle is still in progress. If Bit 0 of the Status Register is
set at 1, write cycle is in progress. If Bit 0 is set at 0, the
device is ready for the next instruction.
Page Write
The CAT25CXXX features page write capability. After
the initial byte, the host may continue to write up to 16
bytes of data to the CAT25C02X/04X and 32 bytes of
data for 25C08X/16X/32X. After each byte of data
received, lower order address bits are internally
incremented by one; the high order bits of address will
remain constant.The only restriction is that the X (X=16
for 25C02X/04X and X=32 for 25C08X/16X/32X) bytes
must reside on the same page. If the address counter
reaches the end of the page and clock continues, the
counter will “roll over” to the first address of the page
and overwrite any data that may have been written. The
CAT25CXXX is automatically returned to the write dis-
able state at the completion of the write cycle. Figure 8
illustrates
the
page
write
sequence.
To write to the status register, the WRSR instruction
should be sent. Only Bit 2, Bit 3 and Bit 7 of the status
register can be written using the WRSR instruction.
Figure 7 illustrates the sequence of writing to status
register.
Figure 4. Read Instruction Timing
SK
SI
CS
SO
RESET
0
0
0
0
0
0
1
1
BYTE ADDRESS*
0
1
2
3
4
5
6
7
8
9
10
20
21
22
23
24
25
26
27
28
29
30
7
6
5
4
3
2
1
0
*Please check the instruction set table for address
Figure 3. WRDI Instruction Timing
SK
SI
CS
SO
0
0
0
0
0
1
0
0
HIGH-Z
25C128 F05
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CAT25C08Y | 功能描述:電可擦除可編程只讀存儲器 (1024x8) 8K RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT25C08Y-1.8 | 功能描述:電可擦除可編程只讀存儲器 (1024x8) 8K RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT25C08Y14 | 功能描述:電可擦除可編程只讀存儲器 (1024x8) 8K RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT25C08Y14-1.8 | 功能描述:電可擦除可編程只讀存儲器 (1024x8) 8K RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT25C08Y14I | 功能描述:電可擦除可編程只讀存儲器 (1024x8) 8K RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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