參數(shù)資料
型號: CAT24WC02RE-REV-F
元件分類: PROM
英文描述: 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8
封裝: MO-187AA, MSOP-8
文件頁數(shù): 8/14頁
文件大小: 505K
代理商: CAT24WC02RE-REV-F
CAT24WC01/02/04/08/16
3
Doc. No. 1022, Rev. N
2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated.
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
program/erase cycle. During the write cycle, the bus
interface circuits are disabled, SDA is allowed to remain
high, and the device does not respond to its slave
address.
Write Cycle Limits
Symbol
Parameter
Min.
Typ.
Max
Units
tWR
Write Cycle Time
10
ms
Power-Up Timing(1)(2)
Symbol
Parameter
Max.
Units
tPUR
Power-up to Read Operation
1
ms
tPUW
Power-up to Write Operation
1
ms
A.C. CHARACTERISTICS
VCC = +1.8V to +5.5V, unless otherwise specified.
Read & Write Cycle Limits
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