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參數(shù)資料
| 型號(hào)： | CAT24FC256JETE13 |
| 元件分類： | EEPROM |
| 英文描述： | 256K-Bit I2C Serial CMOS EEPROM |
| 中文描述： | 256K位I2C串行CMOS EEPROM的 |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大小： | 647K |
| 代理商： | CAT24FC256JETE13 |
DsconinuedPat
CAT24FC256
7
Doc. No. 1040, Rev. K
2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
READ OPERATIONS
The READ operation for the CAT24FC256 is initiated in
the same manner as the write operation with one
exception, that R/
W
bit is set to one. Three different
READ operations are possible: Immediate/Current
Address READ, Selective/Random READ and
Sequential READ.
The CAT24FC256
’
s address counter contains the
address of the last byte accessed, incremented by one.
In other words, if the last READ or WRITE access was
to address N, the READ immediately following would
access data from address N+1. If N=E (where E=32767),
then the counter will
‘
wrap around
’
to address 0 and
continue to clock out data. After the CAT24FC256
receives its slave address information (with the R/
W
bit
set to one), it issues an acknowledge, then transmits the
8 bit byte requested. The master device does not send
an acknowledge, but will generate a STOP condition.
Selective/Random Read
Selective/Random READ operations allow the Master
device to select at random any memory location for a
READ operation. The Master device first performs a
‘
dummy
’
write operation by sending the START condition,
slave address and byte addresses of the location it
wishes to read. After CAT24FC256 acknowledges, the
Master device sends the START condition and the slave
address again, this time with the R/W bit set to one. The
CAT24FC256 then responds with its acknowledge and
sends the 8-bit byte requested. The master device does
not send an acknowledge but will generate a STOP
condition.
The Sequential READ operation can be initiated by
either the Immediate Address READ or Selective READ
operations. After the CAT24FC256 sends the initial 8-bit
byte requested, the Master will respond with an
acknowledge which tells the device it requires more
data. The CAT24FC256 will continue to output an 8-bit
byte for each acknowledge sent by the Master. The
operation will terminate when the Master fails to respond
with an acknowledge, thus sending the STOP condition.
The data being transmitted from CAT24FC256 is
outputted sequentially with data from address N followed
by data from address N+1. The READ operation address
counter increments all of the CAT24FC256 address bits
so that the entire memory array can be read during one
operation. If more than E (where E=32767) bytes are
read out, the counter will
‘
wrap around
’
and continue to
clock out data bytes.
Figure 8. Immediate Address Read Timing
SCL
SDA
8TH BIT
STOP
NO ACK
DATA OUT
8
9
SLAVE
ADDRESS
S
A
C
K
BUS ACTIVITY:
MASTER
SDA LINE
S
T
A
R
T
N
O
A
C
K
DATA
S
T
O
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT24FC256JI-1.8 | 功能描述:電可擦除可編程只讀存儲(chǔ)器 256K (32KX8) Industrial Temp RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24FC256KI-1.8 | 功能描述:電可擦除可編程只讀存儲(chǔ)器 256K (32KX8) RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24FC256LI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT24FC256WA-1.8 | 功能描述:電可擦除可編程只讀存儲(chǔ)器 256K (32KX8) RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24FC256WI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
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