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參數(shù)資料
| 型號： | CAT24C01B |
| 英文描述： | Quadruple 2-Line To1-Line Data Selector / Multiplexer 16-SOIC -40 to 85 |
| 中文描述： | 1K位串行EEPROM |
| 文件頁數(shù)： | 5/7頁 |
| 文件大小： | 40K |
| 代理商： | CAT24C01B |
CAT24C01B
5
Doc. No. 25085-00 7/99 S-1
START Condition
The START Condition precedes all commands to the
device, and is defined as a HIGH to LOW transition of
SDA when SCL is HIGH. The CAT24C01B monitors the
SDA and SCL lines and will not respond until this
condition is met.
STOP Condition
A LOW to HIGH transition of SDA when SCL is HIGH
determines the STOP condition. All operations must end
with a STOP condition.
Acknowledge
After a successful data transfer, each receiving device is
required to generate an acknowledge. The Acknowledg-
ing device pulls down the SDA line during the ninth clock
cycle, signaling that it received the 8 bits of data.
The CAT24C01B responds with an acknowledge after
receiving a START condition and its word address. If the
device has been selected along with a write operation,
it responds with an acknowledge after receiving each 8-
bit byte.
When the CAT24C01B is in a READ mode it transmits
8 bits of data, releases the SDA line, and monitors the
line for an acknowledge. Once it receives this acknowl-
edge, the CAT24C01B will continue to transmit data. If
no acknowledge is sent by the Master, the device
terminates data transmission and waits for a STOP
condition.
WRITE OPERATIONS
Byte Write
In the Byte Write mode, the Master device sends the
START condition and the word address information
(with the R/
W
bit set to zero) to the Slave device. After the
Slave generates an acknowledge, the Master device
transmits the data byte to be written into the addressed
memory location. The CAT24C01B acknowledge once
more and the Master generates the STOP condition, at
which time the device begins its internal programming
cycle to nonvolatile memory. While this internal cycle is
in progress, the device will not respond to any request
from the Master device.
Page Write
The CAT24C01B writes up to 4 bytes of data in a single
write cycle, using the Page Write operation. The Page
Write operation is initiated in the same manner as the
Byte Write operation, however instead of terminating
after the initial word is transmitted, the Master is allowed
to send up to 3 additional bytes. After each byte has been
transmitted the CAT24C01B will respond with an ac-
knowledge, and internally increment the low order ad-
dress bits by one. The high order bits remain un-
changed.
If the Master transmits more than 4 bytes prior to sending
the STOP condition, the address counter ‘wraps around,’
and previously transmitted data will be overwritten.
Once all 4 bytes are received and the STOP condition
has been sent by the Master, the internal programming
cycle begins. At this point all received data is written to
the CAT24C01B in a single write cycle.
Acknowledge Polling
The disabling of the inputs can be used to take advan-
Figure 4. Acknowledge Timing
5020 FHD F06
ACKNOWLEDGE
1
START
SCL FROM
MASTER
8
9
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT24C01B_05 | 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:1K-Bit Serial EEPROM |
| CAT24C01BJ | 功能描述:電可擦除可編程只讀存儲器 (128x8) 1k 2.5-6.0 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24C01BJ-1.8 | 功能描述:電可擦除可編程只讀存儲器 (128x8) 1k 1.8-6.0 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24C01BJ-1.8TE13 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Serial EEPROM |
| CAT24C01BJA | 功能描述:電可擦除可編程只讀存儲器 (128x8) 1k 2.5-6.0 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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