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參數(shù)資料
| 型號(hào)： | CAT22C10J-20-TE13 |
| 英文描述： | NVRAM (EEPROM Based) |
| 中文描述： | NVRAM中（EEPROM的基礎(chǔ)） |
| 文件頁(yè)數(shù)： | 8/10頁(yè) |
| 文件大小： | 107K |
| 代理商： | CAT22C10J-20-TE13 |
CAT22C10
7
Doc. No. 25018-0A 2/98 N-1
Write
With the chip enabled and the nonvolatile functions
inhibited, the Write Enable (
WE) pin will select the write
mode when driven to a low level. In this mode, the
address must be supplied for the byte being written.
After the set-up time (tAS), the input data must be
supplied to pins I/O0–I/O3. When these conditions, in-
Figure 2. Write Cycle Timing
5153 FHD F04
Figure 3. Early Write Cycle Timing
5153 FHD F05
cluding the write pulse width time (tWP) are met, the data
will be written to the specified location in the Static RAM.
A write function may also be initiated from the standby
mode by driving
WE low, inhibiting the nonvolatile func-
tions, supplying valid addresses, and then taking
CS low
and supplying input data.
tWC
tAS
tWR
DATA VALID
CS
DATA IN
ADDRESS
WE
tWP
tDW
tCW
tDH
DATA OUT
HIGH-Z
tWC
tAS
tWR
DATA VALID
CS
DATA IN
ADDRESS
WE
tWP
tDW
tCW
tDH
DATA OUT
tWZ
tOW
HIGH-Z
This Material Copyrighted by Its Respective Manufacturer
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CAT22C10J-30 | NVRAM (EEPROM Based) |
| CAT22C10J-30-TE13 | NVRAM (EEPROM Based) |
| CAT22C10JA-20 | NVRAM (EEPROM Based) |
| CAT22C10JA-20-TE13 | NVRAM (EEPROM Based) |
| CAT22C10JA-30 | NVRAM (EEPROM Based) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT22C10J-30 | 制造商:Catalyst Semiconductor 功能描述:Non-Volatile RAM, 64 x 4, 16 Pin, Plastic, SOP |
| CAT22C10J-30TE13 | 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:256-Bit Nonvolatile CMOS Static RAM |
| CAT22C10J-30-TE13 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:NVRAM (EEPROM Based) |
| CAT22C10JA-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:NVRAM (EEPROM Based) |
| CAT22C10JA-20TE13 | 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:256-Bit Nonvolatile CMOS Static RAM |
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