參數(shù)資料
型號: CAT1832Z-GT2
英文描述: 5V and 3.3V Supply Monitor, Watchdog Timer, Manual Reset, with Active High & Low Resets
中文描述: 5V和3.3V電源監(jiān)視器,看門狗定時器,手動復位,與Active高
文件頁數(shù): 3/12頁
文件大?。?/td> 182K
代理商: CAT1832Z-GT2
3
CAT1232LP/CAT1832
Doc. No. 25089, Rev. 0C
2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, 1.0V
V
CC
5.5V and over the operating temperature range of -40
°
C to +85
°
C. All
voltages are referenced to ground.
ABSOLUTE MAXIMUM RATINGS*
Voltage on V
CC
....................................... -0.5V to 7.0V
Voltage on
ST
and TD ................. -0.5V to V
CC
+ 0.5V
Voltage on
PBRST
,
RESET
and RESET ............................ -0.5V to V
CC
+ 0.5V
Notes:
(1)
PBRST
is internally pulled HIGH to V
CC
through a nominal 40k
resistor (R
PU
).
(2)
RESET
is an open drain output on the CAT1232LP.
(3) RESET remains within 0.5V of V
CC
on power-down until V
CC
falls
below 2V. RESET remains within 0.5V of ground on power-down
until V
CC
falls below 2.0V.
Maximum Junction Temperature ...................... 125
°
C
Storage Temperature Range ............ -65
°
C to +150
°
C
Lead Soldering Temperature (10 sec).............. 300
°
C
Operating Temperature Range........... -40
°
C to +85
°
C
l
b
m
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C
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m
y
p
a
r
a
u
P
S
s
n
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n
o
C
n
M
0
p
y
T
x
a
M
5
5
3
s
U
V
e
g
a
V
I
1
C
C
t
e
C
y
p
u
S
V
C
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V
C
C
)
P
L
2
2
3
3
2
8
1
1
T
T
A
A
C
C
,
,
V
V
5
6
=
=
5
0
3
2
0
5
A
μ
V
H
I
T
S
d
n
a
T
S
R
B
P
l
v
e
L
h
g
H
t
p
n
2
4
V
C
C
V
3
+
V
)
V
C
C
V
-
V
L
T
S
d
n
a
T
S
R
B
P
l
v
e
L
w
o
L
t
p
n
V
C
C
P
L
2
3
2
1
T
A
C
,
V
5
=
3
8
V
V
C
C
A
C
2
3
8
1
T
A
C
,
V
L
6
3
2
=
1
5
7
V
P
T
C
C
V
C
C
V
C
C
)
D
N
G
=
L
O
T
(
t
P
p
T
P
2
T
0
5
2
6
4
V
V
P
T
C
C
V
=
L
O
T
(
t
P
p
T
C
C
)
P
L
2
3
2
1
T
A
C
5
2
7
3
9
4
V
V
P
T
C
C
V
C
C
)
D
N
G
=
L
O
T
(
t
P
p
T
2
3
8
1
T
A
C
0
8
8
8
7
9
V
V
P
T
C
C
t
D
T
t
D
T
t
D
T
V
H
O
I
H
O
V
C
C
c
W
c
W
c
W
p
O
V
=
L
O
T
(
t
P
p
T
C
C
)
2
3
8
1
T
A
C
7
4
5
5
4
6
V
d
d
d
o
P
o
P
o
P
t
t
t
O
O
O
-
-
-
e
m
m
m
g
i
i
i
g
g
g
a
V
o
o
o
d
d
d
h
h
h
D
N
G
V
n
0
5
=
=
o
D
D
D
=
T
T
T
I
5
6
0
5
5
2
-
0
5
1
0
5
2
s
s
s
m
m
m
V
C
C
0
0
5
0
0
0
0
1
-
2
1
6
0
0
0
0
0
0
2
1
g
μ
t
A
0
)
V
C
C
V
V
C
C
V
t
e
C
t
p
O
V
4
=
t
p
O
)
0
5
3
A
μ
I
L
O
I
L
R
U
P
C
N
I
t
e
g
U
a
a
e
C
k
a
e
-
P
l
p
a
C
t
L
p
O
p
n
n
p
n
,
V
4
=
t
p
O
0
1
0
2
3
A
A
m
μ
k
p
a
t
)
0
5
5
r
e
e
R
c
p
n
)
0
4
5
t
F
C
T
U
O
t
B
P
e
c
n
a
a
p
a
C
t
p
O
7
F
s
p
m
T
u
S
m
R
B
i
P
M
t
s
e
e
R
m
l
u
i
w
n
o
a
L
M
m
T
S
R
B
P
V
=
L
0
2
t
T
S
R
t
T
S
e
m
i
e
v
A
t
s
e
R
0
5
2
0
0
6
0
0
0
1
s
m
T
S
V
C
C
E
R
V
C
C
B
P
E
R
V
C
C
E
R
V
C
C
h
W
e
D
r
R
e
R
w
e
T
S
R
a
S
n
a
T
E
S
o
e
D
T
E
S
n
w
e
e
s
P
l
F
E
S
)
0
2
s
s
n
μ
t
D
P
R
o
E
S
E
T
T
5
8
t
F
0
2
s
s
μ
m
t
Y
L
D
P
o
v
A
r
T
W
T
E
S
O
E
S
E
R
e
L
e
d
R
E
e
0
2
t
U
P
R
v
a
e
R
t
E
S
I
R
s
μ
5
=
0
5
2
0
0
6
0
0
0
1
s
m
t
R
V
5
7
o
V
5
2
0
s
n
(4) Must not exceed the minimum watchdog time-out period (t
TD
).
The watchdog circuit cannot be disabled. To avoid a reset,
ST
must be strobed.
(5) Measured with V
CC
2.7V.
(6) Measured with V
CC
< 2.7V.
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