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參數(shù)資料
| 型號(hào)： | CAT1832WT3 |
| 英文描述： | 5V and 3.3V Supply Monitor, Watchdog Timer, Manual Reset, with Active High & Low Resets |
| 中文描述： | 5V和3.3V電源監(jiān)視器，看門狗定時(shí)器，手動(dòng)復(fù)位，與Active高 |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大?。?/td> | 182K |
| 代理商： | CAT1832WT3 |
5
CAT1232LP/CAT1832
Doc. No. 25089, Rev. 0C
2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
APPLICATION INFORMATION
SUPPLY VOLTAGE MONITOR
Reset Signal Polarity and Output Stage Structure
RESET
is an active LOW signal. It is developed with an
open drain driver in the CAT1232LP. A pull-up resistor
is required, typical values are 10k
to 50k
. The
CAT1832 uses a CMOS push-pull output stage for the
RESET
.
RESET is an active High signal developed by a CMOS
push-pull output stage and is the logical opposite to
RESET
.
Trip Point Tolerance Selection
The TOL input is used to select the V
CC
trip point
threshold. This selection is made connecting the TOL
input to ground or V
CC
. Connecting TOL to Ground
makes the V
CC
trip threshold 4.62V for the CAT1232LP
and 2.88V for the CAT1832.
Connecting TOL to VCC makes the VCC trip threshold
4.37V for the CAT1232LP and 2.55V for the CAT1832.
After V
CC
has risen above the trip point set by TOL,
RESET and
RESET
remain active for a minimum time
period of 250ms.
On power-down, once V
CC
falls below the reset threshold
the RESET outputs will remain active and are guaranteed
valid down to a V
CC
level of 1.0V.
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3
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3
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C
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1
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%
0
1
5
2
7
3
9
4
%
5
0
5
2
6
4
7
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0
2
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4
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5
4
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0
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Figure 1. Timing Diagram: Power Up
Figure 2. Timing Diagram: Power Down
V
CCTP(MAX)
V
CCTP
V
CCTP(MIN)
V
CC
RESET
RESET
t
R
t
RPU
V
OH
V
OL
V
CCTP(MAX)
V
CCTP
V
CCTP(MIN)
V
CC
RESET
RESET
t
F
V
OH
V
OL
t
RPD
Manual Reset Operation
Push-button input,
PBRST
, allows the user to issue
reset signals. The pushbutton input is debounced and is
pulled high through an internal 40k
resistor.
When
PBRST
is held low for the minimum time of 20 ms,
both resets become active and remain active for a
minimum time period of 250ms after
PBRST
returns
high.
No external pull-up resistor is required, since
PBRST
is
pulled high by an internal 40k
resistor.
PBRST
can be driven from a TTL or CMOS logic line or
short-ed to ground with a mechanical switch.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT1832Z | 功能描述:監(jiān)控電路 3.3 V RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| CAT1832ZG | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT1832Z-G | 功能描述:監(jiān)控電路 Supervisor,3.3V RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| CAT1832Z-GT3 | 功能描述:監(jiān)控電路 Supervisor,3.3V RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| CAT1832Z-T3 | 功能描述:監(jiān)控電路 3.3 V RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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