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參數(shù)資料
| 型號(hào)： | CAT1641JI-25 |
| 元件分類(lèi)： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封裝： | MS-012, SOIC-8 |
| 文件頁(yè)數(shù)： | 18/18頁(yè) |
| 文件大?。?/td> | 150K |
| 代理商： | CAT1641JI-25 |
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9
Advance Information
CAT1640, CAT1641
Doc No. 25082, Rev. 00
ACKNOWLEDGE
After a successful data transfer, each receiving device
is required to generate an acknowledge. The
acknowledging device pulls down the SDA line during
the ninth clock cycle, signaling that it received the 8 bits
of data.
The CAT1640/41 responds with an acknowledge after
receiving a START condition and its slave address. If the
device has been selected along with a write operation,
it responds with an acknowledge after receiving each 8-
bit byte.
When the CAT1640/41 begins a READ mode it transmits
8 bits of data, releases the SDA line and monitors the
line for an acknowledge. Once it receives this
acknowledge, the CAT1640/41 will continue to transmit
data. If no acknowledge is sent by the Master, the device
terminates data transmission and waits for a STOP
condition.
WRITE OPERATIONS
Byte Write
In the Byte Write mode, the Master device sends the
START condition and the slave address information (with
the R/
W bit set to zero) to the Slave device. After the Slave
generates an acknowledge, the Master sends two 8-bit
address bytes that are to be written into the address
pointers of the device. After receiving another acknowledge
from the Slave, the Master device transmits the data to be
written into the addressed memory location. The CAT1640/
41 acknowledges once more and the Master generates
the STOP condition. At this time, the device begins an
internal programming cycle to non-volatile memory. While
the cycle is in progress, the device will not respond to any
request from the Master device.
Figure 7. Slave Address Bits
CAT
Default Configuration
1010
A2
A1
A0
R/W
START BIT
SDA
STOP BIT
SCL
Figure 5. Start/Stop Timing
ACKNOWLEDGE
1
START
SCL FROM
MASTER
89
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
Figure 6. Acknowledge Timing
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| CAT1641RD2I-42TE13 | 1-CHANNEL POWER SUPPLY SUPPORT CKT, DSO8 |
| CAT1641YI-42TE13 | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| CAT1640JI-25TE13 | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| CAT1640UI-25 | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT1641LI25 | 功能描述:監(jiān)控電路 CPU w/64K RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類(lèi)型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| CAT1641LI28 | 功能描述:監(jiān)控電路 CPU w/64K RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類(lèi)型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| CAT1641LI-28-G | 功能描述:監(jiān)控電路 CPU w/64K RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類(lèi)型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| CAT1641LI30 | 功能描述:監(jiān)控電路 CPU w/64K RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類(lèi)型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| CAT1641LI-30-G | 功能描述:監(jiān)控電路 CPU w/64K RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類(lèi)型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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