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| 型號： | CAT1161JI-30 |
| 英文描述： | OMNIFET FULLY AUTOPROTECTED POWER MOSFET |
| 中文描述： | I2C串行EEPROM，帶有監(jiān)控功能 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 71K |
| 代理商： | CAT1161JI-30 |
3
CAT1161/2
Doc No. 3002, Rev. C
CAPACITANCE
TA = 25C, f = 1.0 MHz, VCC = 5V
Symbol
Test
Conditions
Max
Units
CI/O(1)
Input/Output Capacitance (SDA)
VI/O = 0V
8
pF
CIN(1)
Input Capacitance (SCL)
VIN = 0V
6
pF
VCC = 2.7V - 6V
VCC = 4.5V - 5.5V
SYMBOL
PARAMETER
Min
Max
Min
Max
Units
FSCL
Clock Frequency
100
400
kHz
TI(1)
Noise Suppresion Time
200
ns
Constant at SCL, SDA Inputs
tAA
SLC Low to SDA Data Out
3.5
1
s
and ACK Out
tBUF(1)
Time the Bus Must be Free Before
4.7
1.2
s
a New Transmission Can Start
tHD:STA
Start Condition Hold Time
4
0.6
s
tLOW
Clock Low Period
4.7
1.2
s
tHIGH
Clock High Period
4
0.6
s
tSU:STA
Start Condition Setup Time
4.7
0.6
s
(for a Repeated Start Condition)
tHD:DAT
Data in Hold Time
0
ns
tSU:DAT
Data in Setup Time
50
ns
tR(1)
SDA and SCL Rise Time
1
0.3
s
tF(1)
SDA and SCL Fall Time
300
ns
tSU:STO
Stop Condition Setup Time
4
0.6
s
tDH
Data Out Hold Time
100
ns
A.C. CHARACTERISTICS
VCC=2.7V to 6.0V unless otherwise specified.
Output Load is 1 TTL Gate and 100pF.
POWER-UP TIMING (1)(2)
Symbol
Parameter
Max
Units
tPUR
Power-up to Read Operation
1
ms
tPUW
Power-up to Write Operation
1
ms
NOTE:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) tPUR and tPUW are the delays required from the time VCC is stable until the specific operation can be initiated.
WRITE CYCLE LIMITS
Symbol
Parameter
Min
Typ
Max
Units
tWR
Write Cycle Time
10
ms
The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the
write cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device does not respond to its slave address.
相關PDF資料 |
PDF描述 |
|---|---|
| CAT1161JI-42 | "Omnifet": fully autoprotected Power MOSFET |
| CAT1161JI-45 | OMNIFET II: FULLY AUTOPROTECTED POWER MOSFET |
| CAT1161P-25 | "Omnifet": fully autoprotected Power MOSFET |
| CAT1161P-28 | Omnifet: fully autoprotected Power MOSFET |
| CAT1161P-30 | Omnifet II: fully autoprotected Power MOSFET |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CAT1161JI-42 | 功能描述:監(jiān)控電路 16K I2C Memory w/WDT RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| CAT1161L-25 | 功能描述:監(jiān)控電路 16K I2C Memory w/WDT RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| CAT1161L-42 | 功能描述:監(jiān)控電路 16K I2C Memory w/WDT RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| CAT1161L-42 | 制造商:ON Semiconductor 功能描述:IC SUPERVISORY CCT W/ 16K E2 |
| CAT1161LI25 | 功能描述:監(jiān)控電路 16K I2C Memory w/WDT RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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