參數(shù)資料
型號: CAT1023UE-45TE13
元件分類: Codec
英文描述: Surround-Sound CODEC IC; IC Function:Surround-Sound CODEC IC; Package/Case:64-LQFP; IC Generic Number:42428; Leaded Process Compatible:No; No. of Bits:24; No. of Channels:8; Operating Temp. Max:70 C; Operating Temp. Min:-10 C RoHS Compliant: Yes
中文描述: 監(jiān)控電路,帶有I2C串行的2K位CMOS EEPROM中,手動復(fù)位和看門狗定時器
文件頁數(shù): 10/20頁
文件大小: 149K
代理商: CAT1023UE-45TE13
10
CAT1021, CAT1022, CAT1023
Doc. No. 3009, Rev. K
ACKNOWLEDGE
After a successful data transfer, each receiving device
is required to generate an acknowledge. The
acknowledging device pulls down the SDA line during
the ninth clock cycle, signaling that it received the 8 bits
of data.
All devices respond with an acknowledge after receiving
a START condition and its slave address. If the device
has been selected along with a write operation, it
responds with an acknowledge after receiving each 8-
bit byte.
When a device begins a READ mode it transmits 8 bits
of data, releases the SDA line and monitors the line for
an acknowledge. Once it receives this acknowledge, the
device will continue to transmit data. If no acknowledge
is sent by the Master, the device terminates data
transmission and waits for a STOP condition.
WRITE OPERATIONS
Byte Write
In the Byte Write mode, the Master device sends the
START condition and the slave address information (with
the R/
W
bit set to zero) to the Slave device. After the Slave
generates an acknowledge, the Master sends a 8-bit
address that is to be written into the address pointers of
the device. After receiving another acknowledge from the
Slave, the Master device transmits the data to be written
into the addressed memory location. The device
acknowledges once more and the Master generates the
STOP condition. At this time, the device begins an
internal programming cycle to non-volatile memory. While
the cycle is in progress, the device will not respond to any
request from the Master device.
Figure 7. Slave Address Bits
Default Configuration
1
0
1
0
0
0
0
R/W
START BIT
SDA
STOP BIT
SCL
Figure 5. Start/Stop Timing
ACKNOWLEDGE
1
START
SCL FROM
MASTER
8
9
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
Figure 6. Acknowledge Timing
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參數(shù)描述
CAT1023UE-45-TE13 功能描述:監(jiān)控電路 2K bit 4.5V Ext Temp RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
CAT1023UI-25 功能描述:監(jiān)控電路 2K bit 2.5V Ind Temp RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
CAT1023UI-25TE13 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM, Manual Reset and Watchdog Timer
CAT1023UI-25-TE13 功能描述:監(jiān)控電路 2K bit 2.5V Ind Temp RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
CAT1023UI-28 功能描述:監(jiān)控電路 2K bit 2.8V Ind Temp RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel