Typical Values Intended Only for Design Guidance, VSUPPLY =" />
參數(shù)資料
型號(hào): CA3130MZ
廠商: Intersil
文件頁(yè)數(shù): 11/17頁(yè)
文件大?。?/td> 0K
描述: IC OP AMP 15MHZ BIMOS 8-SOIC
標(biāo)準(zhǔn)包裝: 1,960
放大器類型: 通用
電路數(shù): 1
轉(zhuǎn)換速率: 30 V/µs
增益帶寬積: 15MHz
電流 - 輸入偏壓: 5pA
電壓 - 輸入偏移: 8000µV
電流 - 電源: 10mA
電流 - 輸出 / 通道: 45mA
電壓 - 電源,單路/雙路(±): 5 V ~ 16 V,±2.5 V ~ 8 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
3
Electrical Specifications
Typical Values Intended Only for Design Guidance, VSUPPLY = ±7.5V, TA = 25
oC
Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
CA3130,
CA3130A
UNITS
Input Offset Voltage Adjustment Range
10k
Across Terminals 4 and 5 or
4 and 1
±22
mV
Input Resistance
RI
1.5
T
Input Capacitance
CI
f = 1MHz
4.3
pF
Equivalent Input Noise Voltage
eN
BW = 0.2MHz, RS = 1M
(Note 3)
23
V
Open Loop Unity Gain Crossover Frequency
(For Unity Gain Stability
≥47pF Required.)
fT
CC = 0
15
MHz
CC = 47pF
4
MHz
Slew Rate:
SR
CC = 0
30
V/
s
Open Loop
Closed Loop
CC = 56pF
10
V/
s
Transient Response:
CC = 56pF,
CL = 25pF,
RL = 2k
(Voltage Follower)
0.09
s
Rise Time
tr
Overshoot
OS
10
%
Settling Time (To <0.1%, VIN = 4VP-P)tS
1.2
s
NOTE:
3. Although a 1M
source is used for this test, the equivalent input noise remains constant for values of RS up to 10M.
Electrical Specifications
Typical Values Intended Only for Design Guidance, V+ = 5V, V- = 0V, TA = 25
oC
Unless Otherwise Specified (Note 4)
PARAMETER
SYMBOL
TEST CONDITIONS
CA3130
CA3130A
UNITS
Input Offset Voltage
VIO
82
mV
Input Offset Current
IIO
0.1
pA
Input Current
II
22
pA
Common-Mode Rejection Ratio
CMRR
80
90
dB
Large-Signal Voltage Gain
AOL
VO = 4VP-P, RL = 5k
100
kV/V
100
dB
Common-Mode Input Voltage Range
VICR
0 to 2.8
V
Supply Current
I+
VO = 5V, RL =
300
A
VO = 2.5V, RL =
500
A
Power Supply Rejection Ratio
VIO/V+
200
V/V
NOTE:
4. Operation at 5V is not recommended for temperatures below 25oC.
CA3130, CA3130A
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