14
NOTES:
11. Transistors QP1, QP2, QP3 and QN1, QN2, QN3 are parallel connected with Q8 and Q12, respectively, of the CA3130.
12. See file number 619.
FIGURE 17. CMOS TRANSISTOR ARRAY (CA3600E) CONNECTED AS POWER BOOSTER IN THE OUTPUT STAGE OF THE CA3130
8
7
3
2
+15V
2k
CA3130
+
-
4
10
3
6
4
9
7
6
14
750k
1
F
2
11
13
1
12
5
8
1
F
1M
0.01
F
510k
500
F
QP3
QN1
QN2
QN3
QP2
QP1
CA3600E
AV(CL) = 48dB
LARGE SIGNAL
BW (-3 dB) = 50kHz
RL = 100
(PO = 150mW
AT THD = 10%)
(NOTE 12)
INPUT
Typical Performance Curves
FIGURE 18. OPEN LOOP GAIN vs TEMPERATURE
FIGURE 19. OPEN-LOOP RESPONSE
LOAD RESISTANCE = 2k
150
140
130
120
110
100
90
80
-100
-50
0
50
100
OPE
N
L
O
OP
V
O
L
T
A
G
E
GAI
N
(d
B)
TEMPERATURE (oC)
SUPPLY VOLTAGE: V+ = 15V; V- = 0
TA = 25
oC
φ OL
3
2
1
2
3
4
AOL
1 - CL = 9pF, CC = 0pF, RL = ∞
2 - CL = 30pF, CC = 15pF, RL = 2k
3 - CL = 30pF, CC = 47pF, RL = 2k
4 - CL = 30pF, CC = 150pF, RL = 2k
120
100
80
60
40
20
0
OPE
N
L
O
P
V
O
L
T
A
G
E
GAI
N
(d
B)
-100
-200
-300
O
PEN
LOO
P
HASE
(DEG
REES)
102
103
104
105
106
107
108
FREQUENCY (Hz)
101
CA3130, CA3130A