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參數(shù)資料
| 型號： | C9832HT |
| 英文描述： | Up to 5A ULDO linear regulator |
| 中文描述： | CPU系統(tǒng)時(shí)鐘發(fā)生器|采用TSSOP | 56PIN |塑料 |
| 文件頁數(shù)： | 21/24頁 |
| 文件大?。?/td> | 169K |
| 代理商： | C9832HT |
C9832H
High Performance Pentium 4 Clock Synthesizer
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07109 Rev. **
5/24/2001
Page 21 of 24
Approved Product
DC Characteristics
Current Accuracy
Conditions
Iout
VDD = nominal (3.30V)
Configuration
M0 = 0 or 1 and Rr shown in
Table
All combinations of M0 or 1
and Rr shown in Table
Load
Nominal test load for
given configuration
Nominal test load for
given configuration
Min
-7% Inom
Max
+ 7% Inom
Iout
VDD = 3.30 +/- 5%
-12% Inom
+ 12% Inom
Note: Inom refers to the expected current based on the configuration of the device.
DC Component Parameters
(VDD = 3.3V
±
5%, TA = 0
°
C to +70
°
C)
Characteristic
Symbol
Dynamic Supply Current
Idd3.3V
Min
Typ
Max
280
Units
mA
Conditions
-
-
All frequencies at maximum values,
Note 1
PD# Asserted
Power Down Supply
current
Input pin capacitance
Output pin capacitance
Pin Inductance
Crystal pin capacitance
Ipd3.3V
-
-
See
Note 2
5
6
7
42
mA
Cin
Cout
Lpin
Cxtal
-
-
-
-
-
-
pF
pF
nH
pF
30
36
Measured from the Xin or Xout Pin to
Ground.
Note1:
Note2:
Absolute value = ((Programmed CPU Iref) (7)) + 10 ma
All outputs loaded as per maximum capacitive load table.
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