
Rev. 1.0
101
C8051F80x-83x
SBUF0
0x99
UART0 Data Buffer
SCON0
0x98
UART0 Control
SMB0ADM
0xD6
SMBus Slave Address mask
SMB0ADR
0xD7
SMBus Slave Address
SMB0CF
0xC1
SMBus Configuration
SMB0CN
0xC0
SMBus Control
SMB0DAT
0xC2
SMBus Data
SP
0x81
Stack Pointer
SPI0CFG
0xA1
SPI0 Configuration
SPI0CKR
0xA2
SPI0 Clock Rate Control
SPI0CN
0xF8
SPI0 Control
SPI0DAT
0xA3
SPI0 Data
TCON
0x88
Timer/Counter Control
TH0
0x8C
Timer/Counter 0 High
TH1
0x8D
Timer/Counter 1 High
TL0
0x8A
Timer/Counter 0 Low
TL1
0x8B
Timer/Counter 1 Low
TMOD
0x89
Timer/Counter Mode
TMR2CN
0xC8
Timer/Counter 2 Control
TMR2H
0xCD
Timer/Counter 2 High
TMR2L
0xCC
Timer/Counter 2 Low
TMR2RLH
0xCB
Timer/Counter 2 Reload High
TMR2RLL
0xCA
Timer/Counter 2 Reload Low
VDM0CN
0xFF
VDD Monitor Control
XBR0
0xE1
Port I/O Crossbar Control 0
XBR1
0xE2
Port I/O Crossbar Control 1
All other SFR Locations
Reserved
Table 17.2. Special Function Registers (Continued)
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
Register
Address
Description
Page