參數(shù)資料
型號： C8051F206R
廠商： Silicon Laboratories Inc
文件頁數(shù)： 138/146頁
文件大小： 0K
描述： IC 8051 MCU 8K FLASH 48TQFP
標準包裝： 1
系列： C8051F2xx
核心處理器： 8051
芯體尺寸： 8-位
速度： 25MHz
連通性： SPI，UART/USART
外圍設備： 欠壓檢測/復位，POR，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 8KB（8K x 8）
程序存儲器類型： 閃存
RAM 容量： 1.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
數(shù)據(jù)轉換器： A/D 32x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 48-TQFP
包裝： 剪切帶 (CT)
其它名稱： 336-1036-1
C8051F2xx
Rev. 1.6
91
12. Reset Sources
The reset circuitry of the MCU allows the controller to be easily placed in a predefined default condition.
On entry to this reset state, the CIP-51 halts program execution, forces the external port pins to a known
state and initializes the SFRs to their defined reset values. Interrupts and timers are disabled. On exit, the
program counter (PC) is reset, and program execution starts at location 0x0000.
All of the SFRs are reset to predefined values. The reset values of the SFR bits are defined in the SFR
detailed descriptions. The contents of internal data memory are not changed during a reset and any previ-
ously stored data is preserved. However, since the stack pointer SFR is reset, the stack is effectively lost
even though the data on the stack are not altered.
The I/O port latches are reset to 0xFF (all logic ones), activating internal weak pull-ups which take the
external I/O pins to a high state. The weak pull-ups are enabled during and after the reset. If the source of
reset is from the VDD Monitor or writing a '1' to the PORSF bit, the RST pin is driven low until the end of the
VDD reset timeout.
On exit from the reset state, the MCU uses the internal oscillator running at 2MHz as the system clock by
default. Refer to Section 13 for information on selecting and configuring the system clock source. The
Watchdog Timer is enabled using its longest timeout interval. (Section 12.7 details the use of the Watch-
dog Timer.) Once the system clock source is stable, program execution begins at location 0x0000.
There are six sources for putting the MCU into the reset state: power-on/power-fail (VDD monitor), external
RST pin, software commanded, Comparator 0, Missing Clock Detector, and Watchdog Timer. Each reset
source is described below:
Figure 12.1. Reset Sources Diagram
WDT
CIP-51
Core
Missing
Clock
Detector
WD
T
St
ro
b
e
(Software Reset)
/RST
+
-
VDD
Supply
Reset
Timeout
(wired-OR)
System Reset
Supply
Monitor
PRE
Reset
Funnel
+
-
CP0+
Comparator 0
CP0-
C0RSEF
EN
WD
T
E
n
abl
e
EN
MC
D
Enab
le
SWRSF
System
Clock
MonEn
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參數(shù)描述
C8051F206-TB 功能描述:插座和適配器 With C8051F206 MCU RoHS:否 制造商:Silicon Labs 產(chǎn)品:Adapter 用于:EM35x
C8051F220 功能描述:8位微控制器 -MCU 8KB 8ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F220-GQ 功能描述:8位微控制器 -MCU 8KB 8ADC 48P MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F220-GQR 功能描述:8位微控制器 -MCU 8KB 8ADC 48Pin MCU Tape and Reel RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F220R 功能描述:8位微控制器 -MCU T-8 48 Pin RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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