C8051F060/1/2/3/4/5/6/7
Rev. 1.2
209
Figure 18.4. Crossbar Example:
(P1MDIN = 0xE3; XBR0 = 0x3D; XBR1 = 0x14; XBR2 = 0x40)
PIN I/O
012
3456701
234567
012345
670123
4567
TX0
RX0
SCK
MISO
MOSI
NSS
SDA
SCL
TX1
RX1
CEX0
CEX1
CEX2
CEX3
CEX4
CEX5
ECI
ECI0E: XBR0.6
CP0
CP0E: XBR0.7
CP1
CP1E: XBR1.0
CP2
CP2E: XBR3.3
T0
T0E: XBR1.1
/INT0
INT0E: XBR1.2
T1
T1E: XBR1.3
/INT1
INT1E: XBR1.4
T2
T2E: XBR1.5
T2EX
T2EXE: XBR1.6
T3
T3E: XBR3.0
T3EX
T3EXE: XBR3.1
T4
T4E: XBR2.3
T4EX
T4EXE: XBR2.4
/SYSCLK
SYSCKE: XBR1.7
CNVSTR2
CNVSTE2: XBR3.2
AIN
2
.0
AIN
2
.1
AI
N2.
2
AI
N2.
3
AI
N2.
4
AIN
2
.5
AIN
2
.6
AIN
2
.7
CP
1+
CP
1-
CP
2+
CP
2-
CP
0+
CP
0-
P0
P1
P2
P3
Crossbar Register Bits
XBR0.2
XBR0.1
XBR0.0
SMB0EN:
XBR2.2
XBR0.[5:3]
UART0EN:
SPI0EN:
UART1EN:
PCA0ME: