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鍙冩暩璩囨枡
| 鍨嬭櫉锛� | C8051F023R |
| 寤犲晢锛� | Silicon Laboratories Inc |
| 鏂囦欢闋佹暩锛� | 198/272闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC 8051 MCU 64K FLASH 64TQFP |
| 妯欐簴鍖呰锛� | 1 |
| 绯诲垪锛� | C8051F02x |
| 鏍稿績铏曠悊鍣細 | 8051 |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 25MHz |
| 閫ｉ€氭€э細 | EBI/EMI锛孲MBus锛�2 绶�/I²C锛�锛孲PI锛孶ART/USART |
| 澶栧湇瑷倷锛� | 娆犲妾㈡脯/寰╀綅锛孭OR锛孭WM锛屾韩搴﹀偝鎰熷櫒锛學DT |
| 杓稿叆/杓稿嚭鏁革細 | 32 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 64KB锛�64K x 8锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| RAM 瀹归噺锛� | 4.25K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 2.7 V ~ 3.6 V |
| 鏁告摎杞夋彌鍣細 | A/D 8x8b锛�8x10b; D/A 2x12b |
| 鎸暕鍣ㄥ瀷锛� | 鍏ч儴 |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 64-TQFP |
| 鍖呰锛� | 鍓垏甯� (CT) |
| 鍏跺畠鍚嶇ū锛� | 336-1035-1 |
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C8051F020/1/2/3
Rev. 1.4
31
2.
ABSOLUTE MAXIMUM RATINGS
Table 2.1. Absolute Maximum Ratings*
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Ambient temperature under bias
-55
125
掳C
Storage Temperature
-65
150
掳C
Voltage on any Pin (except VDD and Port I/O) with
respect to DGND
-0.3
VDD +
0.3
V
Voltage on any Port I/O Pin or /RST with respect to
DGND
-0.3
5.8
V
Voltage on VDD with respect to DGND
-0.3
4.2
V
Maximum Total current through VDD, AV+, DGND,
and AGND
800
mA
Maximum output current sunk by any Port pin
100
mA
Maximum output current sunk by any other I/O pin
50
mA
Maximum output current sourced by any Port pin
100
mA
Maximum output current sourced by any other I/O pin
50
mA
* Stresses above those listed under 鈥淎bsolute Maximum Ratings鈥� may cause permanent damage to the device. This
is a stress rating only and functional operation of the devices at those or any other conditions above those indicated
in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
鐩搁棞PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| 533082-1 | CONN PIN GUIDE .375 UNPLATED |
| 2-592404-1 | CONN PIN SIZE 20 GOLD CRIMP |
| 533082-6 | HDI KEYING POWER PIN PLTD |
| C8051F022R | IC 8051 MCU 64K FLASH 100TQFP |
| 533082-3 | CONN PIN GUIDE FOR PLUG PLATED |
鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁� |
鍙冩暩鎻忚堪 |
|---|---|
| C8051F02X | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:8K ISP FLASH MCU Family |
| C8051F040 | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 64KB 12ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁告摎绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁告摎 RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| C8051F040DK | 鍔熻兘鎻忚堪:闁嬬櫦(f膩)鏉垮拰宸ュ叿鍖� - 8051 C8051F040DK W/ US POWER SUPPLY RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鐢㈠搧:Development Kits 宸ュ叿鐢ㄤ簬瑭曚及:C8051F960, Si7005 鏍稿績: 鎺ュ彛椤炲瀷:USB 宸ヤ綔闆绘簮闆诲: |
| C8051F040DK-A | 鍔熻兘鎻忚堪:DEV KIT FOR F040/F041/F042/F043 RoHS:鍚� 椤炲垾:绶ㄧ▼鍣�锛岄枊鐧�(f膩)绯荤当(t菕ng) >> 閬庢檪/鍋滅敘闆朵欢绶ㄨ櫉 绯诲垪:- 妯欐簴鍖呰:1 绯诲垪:- 椤炲瀷:MCU 閬╃敤浜庣浉闂滅敘鍝�:Freescale MC68HC908LJ/LK锛�80-QFP ZIF 鎻掑彛锛� 鎵€鍚墿鍝�:闈㈡澘銆佺簻绶氥€佽粺浠�銆佹暩鎿氳〃鍜岀敤鎴舵墜鍐� 鍏跺畠鍚嶇ū:520-1035 |
| C8051F040DK-B | 鍔熻兘鎻忚堪:DEV KIT FOR F040/F041/F042/F043 RoHS:鍚� 椤炲垾:绶ㄧ▼鍣紝闁嬬櫦(f膩)绯荤当(t菕ng) >> 閬庢檪/鍋滅敘闆朵欢绶ㄨ櫉 绯诲垪:- 妯欐簴鍖呰:1 绯诲垪:- 椤炲瀷:MCU 閬╃敤浜庣浉闂滅敘鍝�:Freescale MC68HC908LJ/LK锛�80-QFP ZIF 鎻掑彛锛� 鎵€鍚墿鍝�:闈㈡澘銆佺簻绶�銆佽粺浠躲€佹暩鎿氳〃鍜岀敤鎴舵墜鍐� 鍏跺畠鍚嶇ū:520-1035 |
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