參數(shù)資料
型號(hào): C30C
英文描述: 2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
中文描述: 混合信號(hào)CMOS工藝和專(zhuān)門(mén)模擬
文件頁(yè)數(shù): 2/2頁(yè)
文件大?。?/td> 46K
代理商: C30C
3
μ
m
5 volts & 3 volts
min. typ. max.
Inter-poly
0.44
0.54
0.63
Gate oxide
0.69
0.73
0.78
N+ Junction
0.17
P+ Junction
0.12
Capacitances (fF/
μ
m
2
)
3
μ
m - 5 volts
min. typ. max.
NPN vertical
700
Bipolar gain
1
1
Test condition : Vce = 5 volts
3
μ
m
5 volts & 3 volts
min. typ. max.
Pwell
17000
Pfield in Pwell
2400
3600
4800
N+
20
28
35
P+
80
100
120
Poly gate
15
23
30
Poly capacitor
75
100
125
Metal I
0.038
Metal II
0.038
Resistances (
/sq.)
Note: These values are for guidance only. Many of them can be adjusted to suit customer requirements.
For full process specifications contact a Dalsa Semicoonductor sales office or representative.
I
Vds (volts)
FIG 1 : I-V Characteristics for a 50x
m N-MOSFET
(3
μ
m 5 volts process)
5
Vgs = 2 volts
Vgs = 3 volts
Vgs = 4 volts
Vgs = 5 volts
4
3
2
1
0
0
1
2
3
4
5
FIG 3 : Subthreshold Characteristics at Vds=0.1 volts
for a 50x3
μ
m N-MOSFET (3
μ
m 5 volts Process)
10
-03
Vgs (volts)
I
I
m
A
10
-13
10
-12
10
-11
10
-10
10
-09
10
-08
10
-07
10
-06
10
-05
10
-04
0
0.5
1.0
1.5
2.0
100
75
50
25
FIG 4 : Subthreshold Characteristics at Vds=-0.1 volts
for a 50x3
μ
m P-MOSFET (3
μ
m 5 volts Process)
Vgs (volts)
I
I
m
A
10
-13
10
-12
10
-11
10
-10
10
-09
10
-08
10
-07
10
-06
10
-05
10
-04
0
-2.0
-36
-30
-24
-18
-12
-6
-0
-0.5
-1.0
-1.5
I
Vds (volts)
FIG 2 : I-V Characteristics for a 50x
m P-MOSFET
(3
μ
m 5 volts process)
Vgs = -2 volts
Vgs = -3 volts
Vgs = -4 volts
Vgs = -5 volts
-2.0
-1.5
-1.0
-0.5
0
0
-1
-2
-3
-4
-5
0
3 Micron CMOS Process Family(cont’d)
相關(guān)PDF資料
PDF描述
C30D 4 MBIT (512KB X8) LOW VOLTAGE UV EPROM AND OTP EPROM
C3ENPA1-DS 5.0 or 3.3V, 256Kbit (32Kbit x 8) ZEROPOWER® SRAM
C3ENPB0-DS 4 Mbit (512 Kbit x 8) ZEROPOWER® SRAM
C3F189AD 4 Mbit (512 Kbit x 8) ZEROPOWER® SRAM
C3GD 5V, 64Kbit (8Kbit x 8) ZEROPOWER® SRAM
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