30
PC1851B
Data Sheet S13417EJ2V0DS00
(3) Filter setting (Write register, subaddress 02H, bits D6 to D0)
<1> Write “1” to bit D6 (Pilot canceler: OFF) of subaddress 02H.
<2> Input pilot signal (15.734 kHz, 30 mVrms or higher Note) to COM pin and set data of bits D5 to D0 (FILTER
SETTING bits) of subaddress 02H so that the AC output level of the FOR pin becomes as small as possible
(Decrease the set data from 63 (decimal)).
<3> When setting is completed, write “0” to bit D6 (pilot canceler: ON) of subaddress 02H.
Note Recommended 100 mVrms.
(4) Separation setting (Write register, subaddresses 03H and 04H, bits D5 to D0)
<1> Write “1” to bit D0 (Mute: OFF) of subaddress 06H.
<2> Write “20H” to bits D5 to D0 (HIGH-BAND SEPARATION SETTING bits) of subaddress 04H.
<3> Input composite signal to COM pin (300 Hz, 30 % modulation, L-only, with noise reduction), and set bits D5
to D0 (LOW-BAND SEPARATION SETTING bits) of subaddress 03H so that the output level of the FOR
pin is as small as possible.
<4> Change the modulation frequency of the composite signal to 3 kHz, and set bits D5 to D0 of subaddress
04H so that the output level of the FOR pin is as small as possible.
<5> While bits D5 to D0 of subaddress 04H are set as in step <4> above, repeat the setting procedure of step
<3> for bits D5 to D0 of subaddress 03H.
(5) SAP VCO setting (Write register, subaddress 05H, bits D6 to D0)
Perform this adjustment with no signal applied.
<1> Add a 1 M
resistor between the SOA pin and GND.
<2> Write “1” to bit D0 (Mute: OFF) of subaddress 06H.
<3> Write “1” to bit D6 (5 fH monitor: ON) of subaddress 05H.
<4> Connect a frequency counter to the FOR pin, and set bits D5 to D0 of subaddress 05H (SAP VCO SETTING
bits) so that 78.67 kHz (
±0.5 kHz) is displayed on the frequency counter.
<5> When setting is completed, write “0” to bit D6 (5 fH monitor: OFF) of subaddress 05H.
<6> Delete the 1 M
resistor between the SOA pin and GND.