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| 型號： | C167CS-4R |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | BOARD INTERFACE KGZ/GMS 0-100% |
| 中文描述： | 16位單片機 |
| 文件頁數(shù)： | 64/80頁 |
| 文件大?。?/td> | 1151K |
| 代理商： | C167CS-4R |
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C167CS-4R
C167CS-L
Data Sheet
60
V2.0, 2000-06
A/D Converter Characteristics
(Operating Conditions apply)
Table 12
Parameter
A/D Converter Characteristics
Symbol
Limit Values
min.
4.0
V
SS
– 0.1
V
SS
+ 0.2
V
AGND
0.5
–
Unit Test
Condition
max.
V
DD
+ 0.1
Analog reference supply
Analog reference ground
Analog input voltage range
V
AIN
Basic clock frequency
Conversion time
V
AREF
SR
V
AGND
SR
V
V
V
MHz
–
1)
1)
TUE is tested at
V
AREF
= 5.0 V,
V
AGND
= 0 V,
V
DD
= 4.9 V. It is guaranteed by design for all other voltages
within the defined voltage range.
If the analog reference supply voltage exceeds the power supply voltage by up to 0.2 V
(i.e.
V
AREF
=
V
DD
= + 0.2 V) the maximum TUE is increased to
±
3/11 LSB. This range is not 100% tested.
The specified TUE is guaranteed only if the absolute sum of input overload currents on Port 5 pins (see
I
OV
specification) does not exceed 10 mA.
During the reset calibration sequence the maximum TUE may be
±
4 LSB (
±
12 LSB for channels 16 … 23).
2)
V
AIN
may exceed
V
AGND
or
V
AREF
up to the absolute maximum ratings. However, the conversion result in
these cases will be X000
H
or X3FF
H
, respectively.
3)
The limit values for
f
BC
must not be exceeded when selecting the CPU frequency and the ADCTC setting.
4)
This parameter includes the sample time
t
S
, the time for determining the digital result and the time to load the
result register with the conversion result.
Values for the basic clock
t
BC
depend on programming and can be taken from
Table 13
.
This parameter depends on the ADC control logic. It is not a real maximum value, but rather a fixum.
5)
During the reset calibration conversions can be executed (with the current accuracy). The time required for
these conversions is added to the total reset calibration time.
–
2)
SR
V
AREF
6.25
40
t
BC
+
t
S
+ 2
t
CPU
3328
t
BC
±
2
f
BC
t
C
3)
CC
4)
t
CPU
= 1/
f
CPU
5)
Calibration time after reset
t
CAL
Total unadjusted error
CC
CC
1)
–
–
–
LSB Channels
0 … 15
LSB Channels
16 … 23
k
t
BC
in [ns]
6)7)
TUE
–
±
10
Internal resistance of
reference voltage source
Internal resistance of
analog source
ADC input capacitance
R
AREF
SR
–
t
BC
/60
– 0.25
t
S
/450
– 0.25
33
R
ASRC
SR
–
k
t
S
in [ns]
7)8)
C
AIN
CC
–
pF
7)
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