參數(shù)資料
型號(hào): ASM2P20805A-20-DT
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: 時(shí)鐘及定時(shí)
英文描述: GS-GSK
中文描述: 20805 SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
封裝: QSOP-20
文件頁(yè)數(shù): 2/11頁(yè)
文件大?。?/td> 486K
代理商: ASM2P20805A-20-DT
June 2005
rev 0.2
ASM2P20805A
2.5V CMOS Dual 1-To-5 Clock Driver
2 of 11
Notice: The information in this document is subject to change without notice.
Pin Description
Pin #
Pin Names
Description
9,12
OE
ˉˉ
A
, OE
ˉˉ
B
3-State Output Enable Inputs (Active LOW)
10,11
IN
A
, IN
B
Clock Inputs
2,3,4,6,7
OA
1
-OA
5
Clock Outputs
19,18,17,15,14
OB
1
-OB
5
Clock Outputs
1
V
CCA
Power supply for Bank A
20
V
CCB
Power supply for Bank B
5
GND
A
Ground for Bank A
16
GND
B
Ground for Bank B
8
GND
Q
Ground
13
MON
Monitor Output
Function Table
Inputs
Outputs
OE
ˉˉ
A
, OE
ˉˉ
B
IN
A
, IN
B
OA
n
, OB
n
MON
L
L
L
L
L
H
H
H
H
L
Z
L
H
H
Z
H
Note: H = HIGH; L = LOW; Z = High-Impedance
Capacitance
(T
A
= +25°C, f = 1.0MHz)
Symbol
Parameter*
Conditions
Typ
Max
Unit
C
IN
Input Capacitance
V
IN
= 0V
3
4
pF
C
OUT
Output Capacitance
V
OUT
= 0V
-
6
pF
*This parameter is measured at characterization but not tested.
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