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參數(shù)資料
| 型號： | BUS-65143-310Q |
| 英文描述： | TRANSIL |
| 中文描述： | MIL-STD-1553/ARINC總線控制器/ RTU通訊 |
| 文件頁數(shù)： | 2/24頁 |
| 文件大?。?/td> | 219K |
| 代理商： | BUS-65143-310Q |
10
CMD 1514131211 10 9 8 7 6 54 32 10 P DATA 15 1413 12 1110 9 87 6 5 43 21 0 P
STATUS151413121110 9 8 7 6 54 32 10 P DATA 15141312 1110 9 87 6 5 43 21
RECIEVE COMMAND
TRANSMIT COMMAND
TRANSMITTING
RT RESPONSE TIME
1553 BUS
3.4±.5s
3.5±.5s
NBGT
INCMD
DTREQ
DTGRT
DTACK
R/W
DTSTR
(T/R BIT)
DAT/CMD
A9-A5
A4-A0
D15-D0
STATEN
GBR
BITEN
ME
HS FAIL
RTFAIL
475-550ns
STATUS INPUTS
STROBED IN
SRQ
BUSY
SS FLAG
ADBC
RT FLAG
50ns min
2.2sec
225-275ns
450-550ns
825-925ns
PREVIOUS
WORD COUNT
PREVIOUS
SUBADDRESS
PREVIOUS
MESSAGE
WORD
COUNT
100-150ns
50ns min
100-150ns
2.1s max
200ns min
300ns max
note 6
COMMAND WORD SUBADDRESS FIED
CURRENT WORD COUNT = 00000
100ns max
100-150ns
A10-A0
ARE VALID
(COMMAND
WORD)
START OF NEW
COMMAND WORD
INITIALIZATION
DTGRT IS
RECOGNIZED
COMMAND WORD
TRANSFER TO
SUBSYSTEM
ILLCMD STROBED IN
A4-A0 0(CURRENT
WORD COUNTER)
RTU REQUESTS DATA
BUS FOR COMMAND
WORD TRANSFER
250ns min Setup time
HOLD TIME 600ns min
TRANSMITTING RT
ADDRESS IS
LATCHED
T/R BIT
IS VERIFIED
TRANSMITTING RT
STATUS WORD ADDRESS
IS CHECKED
1st DATA WORD IS
RECIEVED &
VALIDATED
RTU REQUESTS DATA
BUS FOR DATA WORD
TRANSFER
FIGURE 5. RT TO RT (RECEIVE) TIMING DIAGRAM
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BUS-65143-310S | TRANSIL |
| BUS-65143-310W | TRANSIL |
| BUS-65143-310Y | MIL-STD-1553/ARINC Bus Controller/RTU |
| BUS-65143-310Z | MIL-STD-1553/ARINC Bus Controller/RTU |
| BUS-65143-320 | MIL-STD-1553/ARINC Bus Controller/RTU |
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參數(shù)描述 |
|---|---|
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| BUS98A | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:SITCHMODE Series NPN Silicon Power Transistors |
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