參數(shù)資料
型號(hào): BUK565-60A
廠商: NXP SEMICONDUCTORS
元件分類: JFETs
英文描述: PowerMOS transistor Logic level FET
中文描述: 39 A, 60 V, 0.042 ohm, N-CHANNEL, Si, POWER, MOSFET
文件頁數(shù): 1/7頁
文件大?。?/td> 58K
代理商: BUK565-60A
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level FET
BUK565-60A
GENERAL DESCRIPTION
QUICK REFERENCE DATA
N-channel enhancement mode logic
level field-effect power transistor in a
plastic envelope suitable for surface
mount applications.
The device is intended for use in
Switched Mode Power Supplies
(SMPS), motor control, welding,
DC/DC and AC/DC converters, and in
automotive and general purpose
switching applications.
SYMBOL
PARAMETER
MAX.
UNIT
V
DS
I
D
P
tot
T
j
R
DS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance;
60
39
125
175
0.042
V
A
W
C
V
GS
= 5 V
PINNING - SOT404
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
1
gate
2
drain
3
source
mb
drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
PARAMETER
V
DS
Drain-source voltage
V
DGR
Drain-gate voltage
±
V
GS
Gate-source voltage
±
V
GSM
Non-repetitive gate-source voltage t
p
50
μ
s
I
D
Drain current (DC)
I
D
Drain current (DC)
I
DM
Drain current (pulse peak value)
P
tot
Total power dissipation
T
stg
Storage temperature
T
j
Junction temperature
CONDITIONS
-
R
GS
= 20 k
-
MIN.
-
-
-
-
-
-
-
-
- 55
-
MAX.
60
60
15
20
39
28
156
125
175
175
UNIT
V
V
V
V
A
A
A
W
C
C
T
mb
= 25 C
T
mb
= 100 C
T
mb
= 25 C
T
mb
= 25 C
-
-
THERMAL RESISTANCES
SYMBOL PARAMETER
R
th j-mb
Thermal resistance junction to
mounting base
R
th j-a
Thermal resistance junction to
ambient
CONDITIONS
MIN.
-
TYP.
-
MAX.
1.2
UNIT
K/W
minimum footprint,
FR4 board (see Fig 18).
-
50
-
K/W
1
3
mb
2
d
g
s
February 1996
1
Rev 1.000
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