參數(shù)資料
型號: BUK107-50DL
廠商: NXP SEMICONDUCTORS
元件分類: 外設(shè)及接口
英文描述: PowerMOS transistor Logic level TOPFET(功率MOS晶體管邏輯電平TOPFET)
中文描述: 1.1 A BUF OR INV BASED PRPHL DRVR, PDSO4
封裝: PLASTIC, SOT-223, 4 PIN
文件頁數(shù): 5/9頁
文件大?。?/td> 77K
代理商: BUK107-50DL
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
BUK107-50DL
Fig.8. Typical overtemperature protection threshold.
T
j(TO)
= f(V
IS
); condition: V
DS
= 10 V
Fig.9. Typical DC input characteristics, T
= 25 C.
I
IS
& I
ISL
= f(V
IS
); normal operation & protection latched
Fig.10. Typical DC input current.
I
IS
= f(T
j
); parameter V
IS
; normal operation
Fig.11. Input threshold voltage.
V
IS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= 5 V
Fig.12. Typical input clamping characteristic.
I
I
= f(V
IS
); normal operation, T
j
= 25 C.
Fig.13. Overvoltage clamping characteristic, 25 C.
I
D
= f(V
DS
); conditions: V
IS
= 0 V; t
p
300
μ
s
0
2
4
6
8
10
VIS / V
Tj(TO) / C
BUK107-50DL
200
180
160
140
120
100
80
60
TYP.
-50
0
50
150
Tj / C
VIS(TO) / V
BUK107-50DL
3
2
1
TYP.
MAX.
MIN.
100
0
2
4
6
8
VIS / V
IIS & IISL / mA
BUK107-50DL
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
IISL
IIS
RESET
NORMAL
LATCHED
0
2
4
6
8
10
VIS / V
II / mA
BUK107-50DL
10
9
8
7
6
5
4
3
2
1
0
-50
50
150
Tj / C
IIS / uA
BUK107-50DL
500
400
300
200
100
0
100
0
5 V
4 V
VIS / V =
50
52
54
56
58
60
VDS / V
ID / mA
BUK107-50DL
200
150
100
50
0
TYP.
March 1997
5
Rev 1.200
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