參數(shù)資料
型號(hào): BUF05704AIPWP
英文描述: 18 - V SUPPLY MULTI - CHANNER GAMMA CORRECTION BUFFER
中文描述: 18 - V電源多- CHANNER伽瑪校正緩沖區(qū)
文件頁(yè)數(shù): 17/25頁(yè)
文件大小: 384K
代理商: BUF05704AIPWP
SBOS277E JUNE 2004 REVISED DECEMBER 2004
www.ti.com
17
GENERAL PowerPAD DESIGN
CONSIDERATIONS
The BUFxx704 is available in the thermally-enhanced
PowerPAD family of packages. These packages are
constructed using a downset leadframe upon which the
die is mounted, as shown in Figure 28(a) and (b). This
arrangement results in the lead frame being exposed as
a thermal pad on the underside of the package; see
Figure 28(c). Due to this thermal pad having direct
thermal contact with the die, excellent thermal
performance is achieved by providing a good thermal
path away from the thermal pad.
The PowerPAD package allows for both assembly and
thermal management in one manufacturing operation.
During the surface-mount solder operation (when the
leads are being soldered), the thermal pad must be
soldered to a copper area underneath the package.
Through the use of thermal paths within this copper
area, heat can be conducted away from the package
into either a ground plane or other heat-dissipating
device.
Soldering the PowerPAD to the PCB is
always required, even with applications that have
low power dissipation.
This provides the necessary
thermal and mechanical connection between the lead
frame die pad and the PCB.
The PowerPAD must be connected to the device’s most
negative supply voltage.
1. Prepare the PCB with a top-side etch pattern. There
should be etching for the leads as well as etch for the
thermal pad.
2. Place recommended holes in the area of the thermal
pad. Ideal thermal land size and thermal via patterns
(2x3 for BUF05704 PWP-14 and BUF06704
PWP-16; 2x4 for BUF07704 PWP-20; and 2x5 for
BUF11704 PWP-28) can be seen in the technical
brief,
PowerPAD Thermally-Enhanced Package
(SLMA002), available for download at www.ti.com.
These holes should be 13 mils in diameter. Keep
them small, so that solder wicking through the holes
is not a problem during reflow.
3. Additional vias may be placed anywhere along the
thermal plane outside of the thermal pad area. This
helps dissipate the heat generated by the
BUFxx704 IC. These additional vias may be larger
than the 13-mil diameter vias directly under the
thermal pad. They can be larger because they are
not in the thermal pad area to be soldered; thus,
wicking is not a problem.
4. Connect all holes to the internal ground plane.
5. When connecting these holes to the ground plane,
do not
use the typical web or spoke via connection
methodology. Web connections have a high thermal
resistance connection that is useful for slowing the
heat transfer during soldering operations. This
makes the soldering of vias that have plane
connections easier. In this application, however, low
thermal resistance is desired for the most efficient
heat transfer. Therefore, the holes under the
BUFxx704 PowerPAD package should make their
connection to the internal ground plane with a
complete
connection
circumference of the plated-through hole.
6. The top-side solder mask should leave the terminals
of the package and the thermal pad area with its six
holes (BUF05704 and BUF06704), eight holes
(BUF07704) or ten holes (BUF11704) exposed. The
bottom-side solder mask should cover the holes of
the thermal pad area. This prevents solder from
being pulled away from the thermal pad area during
the reflow process.
7. Apply solder paste to the exposed thermal pad area
and all of the IC terminals.
8. With these preparatory steps in place, the
BUFxx704 IC is simply placed in position and run
through the solder reflow operation as any standard
surface-mount component. This preparation results
in a properly installed part.
around
the
entire
DIE
Side View (a)
End View (b)
Bottom View (c)
DIE
Thermal
Pad
The thermal pad is electrically isolated from all terminals in the package.
Figure 28. Views of Thermally-Enhanced DGN Package
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