IDT / ICS 700MHZ, 3.3V LVPECL FREQUENCY S" />
參數(shù)資料
型號: BU7252SF-E2
廠商: Rohm Semiconductor
文件頁數(shù): 6/19頁
文件大小: 0K
描述: IC COMPARATOR DUAL 5.5V SOP-8
標準包裝: 1
類型: 通用
元件數(shù): 2
輸出類型: 推挽式
電壓 - 電源,單路/雙路(±): 1.8 V ~ 5.5 V,±0.9 V ~ 2.75 V
電壓 - 輸入偏移(最小值): 11mV @ 3V
電流 - 輸入偏壓(最小值): 1pA @ 3V
電流 - 輸出(標準): 6mA @ 3V
電流 - 靜態(tài)(最大值): 65µA
CMRR, PSRR(標準): 80dB CMRR,80dB PSRR
傳輸延遲(最大): 550ns
工作溫度: -40°C ~ 105°C
封裝/外殼: 8-SOIC(0.173",4.40mm 寬)
安裝類型: 表面貼裝
包裝: 標準包裝
產(chǎn)品目錄頁面: 1377 (CN2011-ZH PDF)
其它名稱: BU7252SF-E2DKR
IDT / ICS 700MHZ, 3.3V LVPECL FREQUENCY SYNTHESIZER
14
ICS8430B-71 REV A NOVEMBER 20, 2006
ICS8430B-71
700MHZ, CRYSTAL INTERFACE/LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in
Figure 6.
To calculate worst case power dissipation into the load, use the following equations which assume a 50
load, and a termination
voltage of V
CCO
- 2V.
For logic high, V
OUT
= V
OH_MAX
= V
CCO_MAX
– 0.9V
(V
CCO_MAX
- V
OH_MAX
) = 0.9V
For logic low, V
OUT
= V
OL_MAX
= V
CCO_MAX
– 1.7V
(V
CCO_MAX
- V
OL_MAX
) = 1.7V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CCO_MAX
- 2V))/R
L
] * (V
CCO_MAX
- V
OH_MAX
) = [(2V - (V
CCO_MAX
- V
OH_MAX
))/R
L
] * (V
CCO_MAX
- V
OH_MAX
) =
[(2V - 0.9V)/50
] * 0.9V = 19.8mW
Pd_L = [(V
OL_MAX
– (V
CCO_MAX
- 2V))/R
L
] * (V
CCO_MAX
- V
OL_MAX
) = [(2V - (V
CCO_MAX
- V
OL_MAX
))/R
L
] * (V
CCO_MAX
- V
OL_MAX
) =
[(2V - 1.7V)/50
] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW
FIGURE 6. LVPECL DRIVER CIRCUIT AND TERMINATION
Q1
V
OUT
V
CCO
RL
50
V
CCO - 2V
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