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參數(shù)資料
| 型號： | BU61586V1-300 |
| 英文描述： | MIL-STD-1553/ARINC Bus Controller/RTU |
| 中文描述： | MIL-STD-1553/ARINC總線控制器/ RTU通訊 |
| 文件頁數(shù)： | 25/32頁 |
| 文件大小： | 833K |
| 代理商： | BU61586V1-300 |
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Data Device Corporation
www.ddc-web.com
BU-61559 Series
C-12/02-300
Logic +5V Supply
Logic Ground
CH. A -15V/-12V Supply
CH. A +5V Supply
CH. A Transceiver Ground
CH. B -15V/-12V Supply
CH. B +5V Supply
CH. B Transceiver Ground
+5V Logic
Logic Gnd
-15/-12VA
+5VA
GndA
-15/-12VB
+5VB
GndB
14
21
39
77
38
18
58
19
27
78
42
43
44
35
36
37
SIGNAL NAME
PIN NO.
DIP FLAT
PIN NO.
DIP FLAT
PIN NO.
DIP FLAT
DESCRIPTION
POWER AND GROUND (8)
16-bit bidirectional data bus.This bus is
used for interfacing the host processor
to the internal registers and 8K words of
RAM. In addition, in the transparent
mode, this bus allows data transfers to
take place between the internal proto-
col/memory management logic and up
to 64K X 16 of external RAM. Most of
the time, the outputs for D15 through D0
are in their high impedance state.They
drive outward when the host CPU reads
the internal RAM or registers, or when
the protocol /memory management logic
is accessing (either reading or writing)
internal RAM or writing to external RAM
when in the transparent mode. D15-D0
assume their high-impedance states fol-
lowing power turn-on reset.
D15 (MSB)
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0 (LSB)
48
8
47
7
46
6
45
5
44
4
43
3
42
2
41
1
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
SIGNAL NAME
DESCRIPTION
DATA BUS (16)
16-bit bidirectional address bus. In both
the buffered and transparent modes, the
host CPU accesses the BU-61559 reg-
isters and 8K words of internal RAM by
means of A12 through A0. In the trans-
parent mode, A15-A0 drive outward
(towards the CPU) in order for the 1553
protocol/memory management logic to
access up to 64K X 16 of external RAM.
Most of the time, including immediately
after power turn-on RESET, the A15-A0
outputs will be in their disabled (high
impedance) state.
A15 (MSB)
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0 (LSB)
29
67
28
66
27
65
26
64
25
63
24
62
23
61
22
60
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
SIGNAL NAME
DESCRIPTION
ADDRESS BUS (16)
TABLE 7. SIGNAL DESCRIPTIONS BY FUNCTIONAL GROUPS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BU61586V2-100 | MIL-STD-1553/ARINC Bus Controller/RTU |
| BU61586V2-110 | MIL-STD-1553/ARINC Bus Controller/RTU |
| BU61586V2-120 | MIL-STD-1553/ARINC Bus Controller/RTU |
| BU61586V2-200 | MIL-STD-1553/ARINC Bus Controller/RTU |
| BU61586V2-300 | MIL-STD-1553/ARINC Bus Controller/RTU |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BU61586V6-300 | 制造商:DDC 功能描述:MIL-STD-1553/ARINC BUS CONTROLLER/RTU, 70 Pin, Flat Pack |
| BU-61588 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MINIATURE ADVANCED COMMUNICATION ENGINE (MINI-ACE) AND MINI-ACE PLUS |
| BU-61588F0 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MINIATURE ADVANCED COMMUNICATION ENGINE (MINI-ACE) AND MINI-ACE PLUS |
| BU-61588F3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MINIATURE ADVANCED COMMUNICATION ENGINE (MINI-ACE) AND MINI-ACE PLUS |
| BU-61588F3-102 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553/ARINC Bus Controller/RTU |
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