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參數資料
| 型號： | BU-65142F1-870S |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP78 |
| 封裝： | CERAMIC, DFP-78 |
| 文件頁數： | 5/26頁 |
| 文件大?。?/td> | 247K |
| 代理商： | BU-65142F1-870S |
13
Data Device Corporation
www.ddc-web.com
BU-65142 and BUS-65142 SERIES
U-05/02-0
15
DATA
1413121110 9 8 7 6 5 4 3 2 1 0 P
15
STATUS
141312 1110 9 8 7 6 5 4 3 2 1 0 P
200ns min
300ns max
2.85s max
225-275ns
100-150ns
100ns max
50ns min
475-550ns
1st DATA WORD
TRANSFER
DTGRT
IS RECOGNIZED
DATA TRANSFER
STARTS
225-275ns
note6
RTU DATA VALID
2nd DATA WORD IS
RECEIVED &
VALIDATED
RTU REQUESTS DATA
BUS FOR DATA WORD
TRANSFER
50ns min
4.5s
50ns min
475-550ns
2nd DATA WORD
TRANSFER
STATUS WORD
TRANSFER TO
ENCODER
REGISTERS
NO MORE
CONTINUOUS DATA
ENCODER
STARTED UP
RT FAIL
IS CLEARED
IF IT WAS SET
DTGRT
IS RECOGNIZED
DATA TRANSFER
STARTS
225-275ns
RTU DATA VALID
note6
CURRENT WORD COUNT = 00010
CURRENT WORD COUNT = 00001
100-150ns
225-275ns
300ns max
200ns min
3.5±.5s
10.5±.5s
1.1±2s
4.7±.3s
100-150ns
2.85s max
0 P
0P
2. EACH WORD IS DRIVEN FOR
18-19S ON D15-D0.
IF BUF ENA IS ACTIVE THE LAST WORD IS AVAILABLE FOR 3.5-4S SINCE THE STATUS WORD MUST BE SUPPORTED.
3. DATA BUS IS SHOWN WITH BUF ENA CONNECTED TO DTACK (SEE PIN FUNCTION TABLE, PIN 67)
4. THE TIMING DIAGRAM REPRESENTS A DTGRT RESPONSE TIME OF 0.92S FOR COMMAND TRANSFER AND 2.1S FOR DATA.
THE MAXIMUM RESPONSE TIME FROM DTREQ TO DTGRT TO GUARANTEE A SUCCESSFUL TRANSFER IS 1.5S FOR THE COMMAND TRANSFER
AND 2.33S FOR DATA TRANSFER TO THE SUBSYSTEM. THE POSITION OF DTACK WILL VARY DEPENDING ON WHEN DGRT IS ISSUED
5. RTFAIL IS CLEARED WHEN THE STATUS WORD IS TRANSMITTED. ONCE SET, FLAG WILL REMAIN SET FOR THE ENTIRE MESSAGE.
THE INCMD FALLING EDGE CAN BE USED TO LATCH RTFAIL STATUS.
6. 100nS MIN REPRESENTS SETUP TIME FOR VALID DATA BEFORE DTSTR GOES LOW.
1. LEGEND
DON'T CARE
DATA BUS UNDEFINED
REPRESENTS THE SEQUENCE OF EVENTS IF THE COMMAND WAS BROADCAST.
NOTE: NO STATUS WOULD BE TRANSMITTED ON 1553 BUS.
NOTES
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