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| 型號： | BU-65142F1-390Z |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP78 |
| 封裝： | CERAMIC, DFP-78 |
| 文件頁數(shù)： | 13/26頁 |
| 文件大?。?/td> | 247K |
| 代理商： | BU-65142F1-390Z |
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20
Data Device Corporation
www.ddc-web.com
BU-65142 and BUS-65142 SERIES
U-05/02-0
Data transfer grant -- active LOW input
signal from the subsystem that informs
the RT, when DTREQ is asserted, to start
the transfer. Once transfer is started,
DTGRT can be removed.
TABLE 6. PIN FUNCTIONS
82-
Pin
Flat-
Pack
FUNCTION
PACKAGE & PIN
DESCRIPTION
1
2
1
A9
(SA4)
Latched output of the most significant bit
(MSB) in the subaddress field of the
command word.
4
2
A7
(SA2)
3
Latched output of the third most signifi-
cant bit in the subaddress field of the
command word.
6
3
A5
(SA0)
5
Latched output of the least significant bit
(LSB) in the subaddress field of the
command word.
8
4
DB1
7
Bi-directional parallel data bus Bit 1
10
5
DB3
9
Bi-directional parallel data bus Bit 3
12
6
DB5
11
Bi-directional parallel data bus Bit 5
14
7
DB7
13
Bi-directional parallel data bus Bit 7
16
8
DB9
15
Bi-directional parallel data bus Bit 9
18
9
DB11
17
Bi-directional parallel data bus Bit 11
20
10
DB13
19
Bi-directional parallel data bus Bit 13
22
11
DB15
21
Bi-directional parallel data bus Bit 15
(MSB)
24
12
BRO ENA
23
26
13
ADDRE
(RTAD4)
25
Input of the MSB of the assigned termi-
nal address.
28
14
27
Input of the 3rd MSB of the assigned
terminal address.
30
15
ADDRA
(RTAD0)
29
Input of the LSB of the assigned termi-
nal address.
32
16
RTADERR
31
Output signal used to inform subsystem
of an address parity error. If LOW, indi-
cates parity error and the RT will not
respond to any command address to a
single terminal. It will respond to broad-
cast commands if BRO ENA is HIGH.
34
17
TXDATA B
33
LOW output to the primary side of the
coupling transformer that connects B
channel of the 1553 bus.
36
18
NC
35
38
19
GND B
37
Power Supply return connection for the
B channel transceiver.
40
20
RXDATA B
39
79
81
22
21
A1
(WC1/
CWC1)
A3
(WC3/
CWC3)
76
78
Multiplexed address line output. When
INCMD is LOW or A5 thru A9 are all
zeroes or all ones (Mode Command), it
represents the latched output of the 2nd
LSB in the word count field of the com-
mand word. When INCMD is HIGH and
A5 thru A9 are not all zeroes or all ones,
it represents the 2nd LSB of the current
word counter.
Multiplexed address line output. When
INCMD is LOW or A5 thru A9 are all
zeroes or all ones (Mode Command), it
represents the latched output of the 2nd
MSB in the word count field of the com-
mand word. When INCMD is HIGH and
A5 thru A9 are not all zeroes or all ones,
it represents the 2nd MSB of the current
word counter.
Input from the LOW side of the primary
side of the coupling transformer that con-
nects to the A channel of the 1553 Bus.
RXDATA A
51
Built-in-Test Word Enable--LOW level output
pulse (.5s), present when the built-in-test
word is enabled on the parallel data bus.
BITEN
53
Subsystem Service Request-- Input from
the subsystem used to control the Service
Request Bit in the status register. If LOW
when the status word is updated, the
Service Request Bit will be set; if HIGH, it
will be cleared.
SS REQ
55
Illegal Command--active LOW input signal
from the subsystem, strobed in on the ris-
ing edge of INCMD. Used to define the
command word as illegal and to set the
message error bit in the status register.
ILLCMD
57
Latched output of the T/R bit in the com-
mand word.
A10 (T/R)
59
TEST 2
61
Accept Dynamic Bus Control-- active
LOW input signal from the subsystem
used to set the Dynamic Bus Control
Acceptance bit in the status register if the
command word was a valid, legal mode
command for dynamic bus control.
ADBC
63
Data Transfer Request --active LOW out-
put signal to the subsystem indicating that
the RT has data for or needs data from
the subsystem and requests a data trans-
fer over the parallel data bus. Will stay
LOW until transfer is completed or transfer
timeout has occurred.
DTREQ
65
Remote Terminal Failure-- latched active
LOW output signal to the subsystem to
flag detection of a remote terminal contin-
uous self-test failure. Also set if the
Watchdog Timeout circuit is activated.
Cleared by the start of the next message
transmission (status word) and set if prob-
lem is again detected.
RTFAIL
67
Address line output that is LOW whenever
the command word is being transferred to
the subsystem over the parallel data bus,
and is HIGH whenever data words are
being transferred.
(DAT/CMD)
69
A LOW level output pulse (166ns) present
in the middle of every data word transfer
over the parallel data bus. Used to latch
or strobe the data into memory, FIFOs,
registers, etc. Recommended using the
rising edge to clock data in.
DTSTR
71
HSFAIL
73
In-Command -- HIGH level output signal
used to inform the subsystem that the RT
is presently servicing a command.
INCMD
75
77
DTGRT
48
36
50
35
52
34
54
33
56
32
58
31
60
30
62
29
64
28
66
27
68
26
70
25
72
24
23
74
FUNCTION
78-
Pin
Flat-
Pack
TABLE 6. PIN FUNCTIONS (continued)
DESCRIPTION
PACKAGE & PIN
82-
Pin
Flat-
Pack
78-
Pin
Flat-
Pack
Broadcast enable - when HIGH, this
input allows recognition of an RT
address of all ones in the command
word as a broadcast message. When
LOW, it prevents response to RT
address 31 unless it has the assigned
terminal address.
Input from the HIGH side of the primary
side of the coupling transformer that
connects to the B channel of the 1553
78-
Pin
QIP
78-
Pin
QIP
ADDRC
(RTAD2)
Factory test point output-DO NOT USE
(see note 1)*
Handshake Fail-- output signal that goes
LOW and stays LOW whenever the sub-
system fails to supply DTGRT in time to
do a successful transfer. Cleared by the
next NBGT.
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