參數(shù)資料
型號: BU-65142D3-860Z
廠商: DATA DEVICE CORP
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP78
封裝: CERAMIC, QIP-78
文件頁數(shù): 4/26頁
文件大?。?/td> 247K
代理商: BU-65142D3-860Z
12
Data Device Corporation
www.ddc-web.com
BU-65142 and BUS-65142 SERIES
U-05/02-0
CMD 151413121110 9 8 7 6 5 4 3 2 1 0 P DATA 15 1413 12 1110 9 8 7 6 5 4 3 2 1 0 P
STATUS15 1413121110 9 8 7 6 5 4 3 2 1 0 P DATA 15 1413 12 1110 9 8 7 6 5 4 3 2 1
RECEIVE COMMAND
TRANSMIT COMMAND
TRANSMITTING
RT RESPONSE TIME
1553 BUS
3.4±.5s
3.5±.5s
NBGT
INCMD
DTREQ
DTGRT
DTACK
R/W
DTSTR
(T/R BIT)
DAT/CMD
A9-A5
A4-A0
D15-D0
STATEN
GBR
BITEN
ME
HS FAIL
RTFAIL
475-550ns
STATUS INPUTS
STROBED IN
SRQ
BUSY
SS FLAG
ADBC
RT FLAG
50ns min
2.2sec
225-275ns
450-550ns
825-925ns
PREVIOUS
WORD COUNT
PREVIOUS
SUBADDRESS
PREVIOUS
MESSAGE
WORD
COUNT
100-150ns
50ns min
100-150ns
2.1s max
200ns min
300ns max
note 6
COMMAND WORD SUBADDRESS FIELD
CURRENT WORD COUNT = 00000
100ns max
100-150ns
A10-A0
ARE VALID
(COMMAND
WORD)
START OF NEW
COMMAND WORD
INITIALIZATION
DTGRT IS
RECOGNIZED
COMMAND WORD
TRANSFER TO
SUBSYSTEM
ILLCMD STROBED IN
A4-A0 0(CURRENT
WORD COUNTER)
RTU REQUESTS DATA
BUS FOR COMMAND
WORD TRANSFER
250ns min Setup time
HOLD TIME 600ns min
TRANSMITTING RT
ADDRESS IS
LATCHED
T/R BIT
IS VERIFIED
TRANSMITTING RT
STATUS WORD ADDRESS
IS CHECKED
1st DATA WORD IS
RECEIVED &
VALIDATED
RTU REQUESTS DATA
BUS FOR DATA WORD
TRANSFER
FIGURE 6. RT TO RT (RECEIVE) TIMING DIAGRAM
相關(guān)PDF資料
PDF描述
BU-65142F1-340Q 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP78
BU-65142F1-880L 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP78
BU-65142F2-240 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP78
BU-65142F2-290S 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP78
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