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    參數(shù)資料
    型號(hào): BU-65142D2-490S
    英文描述: Controller Miscellaneous - Datasheet Reference
    中文描述: 控制器雜項(xiàng)-數(shù)據(jù)表參考
    文件頁數(shù): 18/24頁
    文件大?。?/td> 219K
    代理商: BU-65142D2-490S
    3
    TABLE 2. BU-65142 SERIES RADIATION SPECIFICATIONS
    PART
    NUMBER
    TOTAL
    DOSE
    SINGLE EVENT
    UPSET
    SINGLE EVENT
    LATCHUP
    BU-65142
    X1/X2
    300K
    Rad
    5.3 x 10-6
    errors/device-day,
    (LET Threshold of
    59 MeV/mg/cm2)
    Immune
    INTRODUCTION
    The BUS-65142 is a complete dual redundant Remote Terminal
    Unit (RTU) packaged in a small 1.9 x 2.1 hybrid. It is fully com-
    pliant with MIL-STD=1553B and supports all message formats.
    As shown in FIGURE 1, it includes 2 transceivers and a custom
    chip containing 2 encoders, 2 bit processors, an RTU protocol
    sequencer and control logic, output latches, and buffers. With
    the addition of 2 data bus transformers, the BUS-65142 is ready
    for connection to a MIL-STD-1553 data bus.
    Data is transferred to and from the subsystem host CPU over a
    16-bit parallel highway, which is isolated by a set of bi-direction-
    al buffers. All transfers are made with a DMA type handshake
    sequence of request, grant and acknowledge. Read/write and
    data strobes are provided to simplify interfacing to external
    RAM. Also simplifying the RAM interface is the availability of
    latched command word and auto-incrementing word counter.
    These signals may be used as an address to map the data
    directly to and from RAM.
    The BUS-65142 allows the subsystem host CPU to control 6 of
    the bits in the RTU status word. Of particular interest is the
    Illegal Command input which may be used to set the message
    error bit and illegalize any command word. The BUS-65142 pro-
    vides four error flags to the subsystem host CPU for evaluating
    its condition. In addition a continuous on-line self-test is per-
    formed by the BUS-65142 on every transmission. The last
    Transmitted Word of every message is wrapped around the
    decoder and compared with the Actual Word. Any discrepancy
    is flagged as an error.
    TIMING
    Interfacing the subsystem host CPU to the BUS-65142 is simple
    and compatible with most microprocessors. FIGURE 3 and 4
    illustrate typical MIL-STD-1553 messages for Transmit data and
    Receive data. FIGURES 5 and 6 illustrate RT to RT transfers. In
    each case
    identifies the start of the message, and
    INCMD identifies that a command is being processed. The hand-
    shake sequence
    ,
    , and
    is used to trans-
    feer each word over the parallel data highway.
    and
    are used to control transfers to RAM memory.
    identifies a “good block received”, when a received message has
    passed all validation checks and has the correct word count.
    (Buffer Enable) must be applied to enable the internal
    tri-state buffers.
    ENA
    BUF
    GBR
    WR
    /
    RD
    DTSRB
    DTACK
    DTGRT
    DTREQ
    NBGT
    TABLE 1. BU-65142 and BUS-65142/44 SPECIFICATIONS (continued)
    °C/W
    °C
    20
    150
    +300
    -55
    -65
    THERMAL
    Thermal Resistance, Junction-to-
    Case, Hottest Die (
    θJC)
    Operating Junction Temperature
    Storage Temperature
    Lead Temperature
    (soldering, 10 sec.)
    in
    (mm)
    in
    (mm)
    in
    (mm)
    in
    (mm)
    oz
    (g)
    PHYSICAL CHARACTERISTICS
    Size
    78-pin Kovar (BUS-65142/43)
    82-pin Kovar Flat Pack
    (BUS-65142/43)
    78-pin Ceramic QIP (BU-65142D)
    78-pin Ceramic Flat Pack
    (BU-65142F)
    Weight
    1.87 x 2.10 x 0.25
    (47.5 x 53.3 x 6.4)
    1.61 x 2.20 x 0.181
    (40.8 x 55.8 x 4.6)
    1.80 x 2.10 x 0.21
    (45.7 x 53.3 x 5.3)
    1.80 x 2.10 x 0.21
    (45.7 x 53.3 x 5.3)
    1.7
    (4.1)
    Note:
    Power dissipation specifications assume a transformer coupled
    configuration, with external disipation (while transmitting) of
    0.14 watts for the active isolation transformer, 0.8 watts for the
    active coupling transformer, 0.45 watts for each of the two bus
    isolation resistors, and 0.15 watts for each of the two bus termi-
    nation resistors.
    相關(guān)PDF資料
    PDF描述
    BU-65142D2-490W Controller Miscellaneous - Datasheet Reference
    BU-65142D2-490Y Controller Miscellaneous - Datasheet Reference
    BU-65142D2-490Z Controller Miscellaneous - Datasheet Reference
    BU-65142D2-500 Controller Miscellaneous - Datasheet Reference
    BU-65142D2-500K Controller Miscellaneous - Datasheet Reference
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