
Data Device Corporation
62743_pre7_noSA-DB.DOC
www.ddc-web.com
8-07-02
74
parity checking for RAM read accesses. When the PCI Enhanced Mini-ACE
detects a RAM parity error, it reports it to the host processor by means of an
interrupt and a register bit. Also, for the RT and Selective Message Monitor modes,
the RAM address(es) where a parity error(s) was detected will be stored on the
Interrupt Status Queue (if enabled).