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參數(shù)資料
| 型號： | BU-62843G4-470K |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
| 封裝： | 1 INCH, CERAMIC, QFP-72 |
| 文件頁數(shù)： | 63/99頁 |
| 文件大?。?/td> | 578K |
| 代理商： | BU-62843G4-470K |
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Data Device Corporation
62743_pre7_noSA-DB.DOC
www.ddc-web.com
8-07-02
66
MONITOR ARCHITECTURE
The PCI Enhanced Mini-ACE includes three monitor modes:
(1) A Word Monitor mode.
(2) A selective message monitor mode.
(3) A combined RT/message monitor mode.
For new applications, it is recommended that the selective message monitor mode
be used, rather than the word monitor mode. Besides providing monitor filtering
based on RT address, T/R* bit, and subaddress, the message monitor eliminates
the need to determine the start and end of messages by software.
WORD MONITOR MODE
In the Word Monitor Terminal mode, the PCI Enhanced Mini-ACE monitors both
1553 buses. After the software initialization and Monitor Start sequences, the PCI
Enhanced Mini-ACE stores all Command, Status, and Data Words received from
both buses. For each word received from either bus, a pair of words is stored to
the PCI Enhanced Mini-ACE's shared RAM. The first word is the word received
from the 1553 bus. The second word is the Monitor Identification (ID), or "Tag"
word. The ID word contains information relating to bus channel, word validity, and
inter-word time gaps. The data and ID words are stored in a circular buffer using
the whole of the shared RAM address space.
WORD MONITOR MEMORY MAP
A typical word monitor memory map is illustrated in Table 61. Table 61 assumes a
64K address space for the PCI Enhanced Mini-ACE's monitor. The Active Area
Stack pointer provides the address where the first monitored word is stored. In the
example, it is assumed that the Active Area Stack Pointer for Area A (location
0100) is initialized to 0000. The first received data word is stored in location 0000,
the ID word for the first word is stored in location 0001, etc.
The current Monitor address is maintained by means of a counter register. This
value may be read by the CPU by means of the Data Stack Address Register. It is
important to note that when the counter reaches the Stack Pointer address of 0100
or 0104, the initial pointer value stored in this shared RAM location will be
overwritten by the monitored data and ID Words. When the internal counter
reaches an address of FFFF (or 0FFF, for an PCI Enhanced Mini-ACE with 4K
RAM), the counter rolls over to 0000.
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相關(guān)代理商/技術(shù)參數(shù) |
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