參數(shù)資料
型號(hào): BU-62843G3-460S
廠商: DATA DEVICE CORP
元件分類(lèi): 微控制器/微處理器
英文描述: 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
封裝: 1 INCH, CERAMIC, QFP-72
文件頁(yè)數(shù): 12/99頁(yè)
文件大?。?/td> 578K
代理商: BU-62843G3-460S
Data Device Corporation
62743_pre7_noSA-DB.DOC
www.ddc-web.com
8-07-02
2
DESCRIPTION
The PCI Enhanced Mini-ACE family of MIL-STD-1553 terminals provides a
complete interface between a 32-Bit / 33Mhz PCI Bus and a MIL-STD-1553 bus.
These terminals integrate dual transceiver, protocol logic, and 4K words or 64K
words of RAM.
With a 1.0-inch square package, the PCI Enhanced Mini-ACE is nearly 100%
footprint and software compatible with the Enhanced Mini-ACE, previous
generation Mini-ACE (Plus) terminals, and is software compatible with the older
ACE series.
The PCI portion of the PCI Enhanced Mini-ACE is powered by 3.3V. The PCI
interface is NOT 5V tolerant.
Multiprotocol support of MIL-STD-1553A/B and STANAG 3838, including
versions incorporating McAir compatible transmitters, is provided. There is a
choice of 10, 12, 16, or 20 MHz 1553 clocks. The BC/RT/MT versions with 64K
words of RAM include built-in RAM parity checking.
BC features include a built-in message sequence control engine, with a set of 20
instructions. This provides an autonomous means of implementing multi-frame
message
scheduling,
message
retry
schemes,
data
double
buffering,
asynchronous message insertion, and reporting to the host CPU.
The PCI Enhanced Mini-ACE RT offers the choices of single and circular
buffering along with a global circular buffering option, 50% rollover interrupt for
circular buffers, and an interrupt status queue.
相關(guān)PDF資料
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BU-62843G3-462Y 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
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