參數(shù)資料
型號(hào): BU-62843F3-470Z
廠商: DATA DEVICE CORP
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
封裝: 1 INCH, CERAMIC, QFP-72
文件頁(yè)數(shù): 60/99頁(yè)
文件大?。?/td> 578K
代理商: BU-62843F3-470Z
Data Device Corporation
62743_pre7_noSA-DB.DOC
www.ddc-web.com
8-07-02
63
Table 57. Illegalization Table Memory Map
INTERNAL
ADDRESS
PCI BAR0
OFFSET
DESCRIPTION
300
600
Brdcst/Rx, SA 0, MC15-0
301
602
Brdcst/SA 0, MC31-16
302
604
Brdcst/Rx, SA 1, WC15-0
303
606
Brdcst/Rx, SA 1, WC31-16
33F
67E
Brdcst/Rx, SA 0, MC15-0
340
680
Brdcst/Tx, SA 0, MC31-16
341
682
Brdcst/Tx, SA 1, WC15-0
342
684
Brdcst/Tx, SA 1, WC31-16
37D
6FA
Brdcst/Tx, SA 30, WC 31-16
37E
6FC
Brdcst/Tx, SA 31, MC 15-0
37F
6FE
Brdcst/Tx, SA 31, MC 31-16
380
700
Own Addr/Rx, SA 0, MC 15-0
381
702
Own Addr/Rx, SA 0, MC 31-16
382
704
Own Addr/Rx, SA 1, WC 15-0
383
706
Own Addr/Rx, SA 1, WC 31-15
3BE
77C
Own Addr/RX, SA 31, MC 15-0
3BF
77E
Own Addr/Rx, SA 31, MC 31-16
3C0
780
Own Addr/Tx, SA 0, MC 15-0
3C1
782
Own Addr/Tx, SA 0, MC 31-16
3C2
784
Own Addr/Tx, SA 1, WC 15-0
3C3
786
Own Addr/Tx, SA 1, WC 31-16
3FC
7F8
Own Addr/Tx, SA 30, WC 15-0
3FD
7FA
Own Addr/Tx, SA 30, WC 31-16
3FE
7FC
Own Addr/Tx, SA 31, MC 15-0
3FF
7FE
Own Addr/TX, SA 31. MC 31-16
BUSY BIT
The PCI Enhanced Mini-ACE RT provides two different methods for setting the
Busy status word bit: (1) globally, by means of Configuration Register #1; or (2) on
a T/R-bit/subaddress basis, by means of a RAM lookup table. If the host CPU
asserts the BUSY bit low in Configuration Register #1, the PCI Enhanced Mini-
ACE RT will respond to all non-broadcast commands with the Busy bit set in its
RT Status Word.
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BU-62843F3-590Q 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
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