參數(shù)資料
型號(hào): BU-62843F3-200Q
廠商: DATA DEVICE CORP
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
封裝: 1 INCH, CERAMIC, QFP-72
文件頁數(shù): 46/99頁
文件大?。?/td> 578K
代理商: BU-62843F3-200Q
Data Device Corporation
62743_pre7_noSA-DB.DOC
www.ddc-web.com
8-07-02
50
General Purpose Queue.
The PCI Enhanced Mini-ACE BC allows for the
creation of a general purpose queue. This data structure provides a means for the
message sequence processor to convey information to the BC host. The BC op
code repertoire provides mechanisms to push various items on this queue. These
include the contents of the Time Tag Register, the Block Status Word for the most
recent message, an immediate data value, or the contents of a specified memory
address.
Figure 5 illustrates the operation of the BC General Purpose Queue. Note that the
BC General Purpose Queue Pointer Register will always point to the next address
location (modulo 64); that is, the location following the last location written by
the BC message sequence control engine.
If enabled, a BC GENERAL PURPOSE QUEUE ROLLOVER interrupt will be
issued when the value of the queue pointer address rolls over at a 64-word
boundary.
Figure 5. BC General Purpose Queue
REMOTE TERMINAL (RT) ARCHITECTURE
The PCI Enhanced Mini-ACE’s RT architecture builds upon that of the ACE and
Mini-ACE. The PCI Enhanced Mini-ACE provides multiprotocol support, with full
compliance to all of the commonly used data bus standards, including MIL-STD-
1553A, MIL-STD-1553B, Notice 2, STANAG 3838, General Dynamics 16PP303,
and McAirA3818, A5232, and A5690. For the PCI Enhanced Mini-ACE RT mode,
there is programmable flexibility enabling the RT to be configured to fulfill any set
of system requirements. This includes the capability to meet the MIL-STD-1553A
Next Location
BC General
Purpose Queue
(64 locations)
BC GENERAL
PURPOSE QUEUE
POINTER
REGISTER
Last Location
Next Location
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