參數(shù)資料
型號(hào)： BU-62843F3-110Q
廠商： DATA DEVICE CORP
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
封裝： 1 INCH, CERAMIC, QFP-72
文件頁數(shù)： 57/99頁
文件大?。?/td> 578K
代理商： BU-62843F3-110Q
Data Device Corporation
62743_pre7_noSA-DB.DOC
www.ddc-web.com
8-07-02
60
BLOCK STATUS WORD
TIME TAG WORD
DATA BLOCK POINTER
RECEIVED COMMAND WORD
DATA POINTER
RECIEVED
(TRANSMITTED)
MESSAGE DATA
50%
ROLLOVER
INTERRUPT
DESCRIPTOR
STACK
LOOK-UP
TABLE
CIRCULAR
BUFFER
(128,256,...8192 WORDS)
*
Note
The example shown is for an RT Subaddress Circular Buffer.
The 50% and 100% Rollover Interrupts are also applicable to
the RT Global Circular Buffer, RT Command Stack, Monitor
Stack, and Monitor Data Stack.
Figure 8. 50% and 100% Rollover Interrupts
Interrupt status queue.
The PCI Enhanced Mini-ACE RT, Monitor, and
combined RT/Monitor modes include the capability for generating an interrupt
status queue. As illustrated in Figure 9, this provides a chronological history of
interrupt generating events and conditions. In addition to the Interrupt Mask
Register, the Interrupt Status Queue provides additional filtering capability, such
that only valid messages and/or only invalid messages may result in the creation of
an entry to the Interrupt Status Queue. Queue entries for invalid and/or valid
messages may be individually disabled by means of bits 8 and 7 of Configuration
Register #6.
100%
ROLLOVER
INTERRUPT
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