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| 型號(hào)： | BU-62843B3-180 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, BGA128 |
| 封裝： | 0.815 X 0.815 INCH, 0.140 INCH HEIGHT, 1 MM PITCH, BGA-128 |
| 文件頁(yè)數(shù)： | 43/93頁(yè) |
| 文件大小： | 504K |
| 代理商： | BU-62843B3-180 |
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Data Device Corporation
62743_pre2.DOC
www.ddc-web.com
8-15-01
48
TABLE 50. TYPICAL RT MEMORY MAP (SHOWN FOR 4K RAM)
ADDRESS
(HEX)
DESCRIPTION
0000-00FF
Stack A
0100
Stack Pointer A
0101
Global Circular Buffer A Pointer
0102-0103
RESERVED
0104
Stack Pointer B
0105
Global Circular Buffer A Pointer
0106-0107
RESERVED
0108-010F
Mode Code Selective Interrupt Table
0110-013F
Mode Code Data
0140-01BF
Lookup Table A
01C0-023F
Lookup Table B
0240-0247
Bust Bit Lookup Table
0248-025F
(not used)
0260-027F
Data Block 0
0280-02FF
Data Block 1-4
0300-03FF
Command Illegalizing Table
0400-041F
Data Block 5
0420-043F
Data Block 6
0FE0-0FFF
Data Block 100
RT MEMORY MANAGEMENT
The PCI Enhanced Mini-ACE provides a variety of RT memory management
capabilities. As with the ACE, Mini-ACE(Plus) and Enhanced Mini-ACE, the choice
of
memory
management
scheme
is
fully
programmable
on
a
transmit/receive/broadcast subaddress basis.
In compliance with MIL-STD-1553B Notice 2, received data from broadcast
messages may be optionally separated from non-broadcast received data. For
each receive or broadcast subaddress, either a single-message data block, a
double buffered configuration (two alternating Data Word blocks), or a variable-
sized (128 to 8192 words) subaddress circular buffer may be allocated for data
storage. The use of Single Buffered mode is strongly recommended for
transmitted data words. The memory management scheme for individual
subaddresses is designated by means of the subaddress control word (reference
Table 52
).
For received data, there is also a global circular buffer mode. In this configuration,
the data words received from multiple (or all) subaddresses are stored in a
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