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| 型號： | BU-61865G4-100 |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁數(shù)： | 4/32頁 |
| 文件大?。?/td> | 833K |
| 代理商： | BU-61865G4-100 |
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4
Data Device Corporation
www.ddc-web.com
BU-61559 Series
C-12/02-300
TABLE 1. BU-61559 SPECIFICATIONS (CONT)
PARAMETER
UNITS
VALUE
POWER DISSIPATION (CONT)
Hottest Die
BU-61559X1
Idle
25% Duty Cycle
50% Duty Cycle
100% Duty Cycle
BU-61559X2
Idle
25% Duty Cycle
50% Duty Cycle
100% Duty Cycle
0.45 typ, 0.68 max
0.65 typ, 1.06 max
0.875 typ, 1.45 max
1.30 typ, 2.23 max
0.39 typ, 0.59 max
0.60 typ, 0.98 max
0.81 typ, 1.36 max
1.30 typ, 2.16 max
W
W
W
W
W
W
W
W
CLOCK INPUT
Frequency
Nominal Value
Long Term Tolerance
Short Term Tolerance, 1 second
Duty Cycle
16.0
±0.1
±0.01
33 min, 67 max
MHz
%
%
%
PHYSICAL CHARACTERISTICS
Size
78-pin Ceramic QIP
78-pin Ceramic Flat Pack
Weight
1.80 x 2.10 x 0.21
(45.7 x 53.3 x 5.3)
1.80 x 2.10 x 0.21
(45.7 x 53.3 x 5.3)
1.7
(48.2)
in.
(mm.)
in.
(mm.)
oz.
(g)
1553 MESSAGE TIMING
Completion of CPU Write (BC Start)-
to Start of first BC Message
BC Intermessage Gap
BC Response Timeout
RT Response Time
Rt-to RT Timeout (Mid-Parity of
Transmit Command to Mid-Sync of
Transmitting RT Status)
Transmitter Watchdog Timeout
5.85 min, 7.21 max
13.98 min, 17.82max.
17.5 min, 19.0 typ,
22.5 max
9.8 min, 10.9 typ,
11.7 max
18.0 min, 18.75 typ,
19.5 max
768 typ
μS
μS
μS
μS
μS
μS
THERMAL
Thermal Resistance, Junction-to-case,
Hottest Die (
JC
)
Thermal Resistance, Case-to-ambient,
Hottest Die (
CA
)
Operating Junction Temperature
Operating Case Temperature
-B, -M
-(blank)
Storage Temperature
Lead Temperature
(soldering, 10 seconds)
6.13
10.5
-55 to +160
-55 to +125
0 to +70
-65 to +150
+300
°C/W
°C/W
°C
°C
°C
°C
°C
Notes:
The following notes are applicable to the Receiver Differential Resistance
and Differential Capacitance specifications:
(1) Specifications include both transmitter and receiver (tied together internally).
(2) Impedance parameters are specified directly between pins TX/RX A(B) and
TX/RX A(B) of the BU-61559 hybrid.
(3) It is assumed that all power and ground inputs to the hybrid are connected and
that the hybrid case is connected to ground for the impedance measurement.
(4) The specifications are applicable for both unpowered and powered conditions.
(5) The specifications assume a 2 Vrms balanced, differential, sinusoidal input.
The applicable frequency range is 75 kHz to 1 MHz.
(6) Minimum resistance and maximum capacitance parameters are guaranteed
over the operating range, but are not tested.
(7) -601 Power Supply Requirements and Power Dissipation values will be higher.
FUNCTIONAL OVERVIEW
GENERAL (REFERENCE BLOCK DIAGRAM FIGURE 1)
The BU-61559 Advanced Integrated Multiplex Hybrid with
enhanced RT features (AIM-HY'er) comprises a complete interface
between a host microprocessor bus and a dual redundant MIL-
STD-1553B Notice 2 bus. The hybrids are comprised of dual low-
power transceivers and encoder/decoders, full BC/RT/MT protocol,
memory management logic, 8K words of internal shared RAM, and
a direct, internally buffered processor interface. The BU-61559 is
packaged in a four square inch hybrid package and is available in
both plug-in and surface mountable (flatpack) packages.
TRANSCEIVERS
The transceiver front end of the BU-61559 AIM-HY'er hybrids is
implemented by means of low-power bipolar analog monolithic
and thick-film hybrid technology. The transceiver requires +5 V
and -15V or -12V only (no +15 V or +12V is required) and include
voltage source transmitters.The voltage source transmitters pro-
vide superior line driving capability for long cables and heavy
amounts of bus loading. In addition, the monolithic transceivers
may be modified to provide a minimum stub voltage of 20Vp-p,
as required for MIL-STD-1760 applications. Consult the factory
for additional information.
The receiver sections of the BU-61559 are fully compliant with
MIL-STD-1553B in terms of front end overvoltage protection,
threshold, common mode rejection, and word error rate. In addi-
tion, the receiver filters have been designed for optimal operation
with the BU-61559's 16 MHz Manchester II decoders.
MIL-STD-1553 PROTOCOL
The 1553 protocol section of the BU-61559 includes dual
encoder/decoders and complete registers, word count, timing,
and sequencing logic for Bus Controller (BC), Remote Terminal
(RT), and Monitor Terminal (MT) modes.The dual Manchester II
decoders utilize a 16 MHz sampling clock, providing superior
performance in terms of word error rate and tolerance to zero-
crossing distortion. The encoder section of the protocol logic
includes a transmitter watchdog timer.The watchdog timer mon-
itors the digital encoder outputs and serves to inhibit the trans-
mitters after a period of 768 μs.
The BC protocol supports all MIL-STD-1553B formats, complete error
detection, and multi-message frames of up to 64 unique messages.
Protocol for RT mode supports all message formats and dual
redundant 1553B mode codes. The BU-61559 has passed the
RT Validation Test Plan at SEAFAC; this test encompasses the
dual transceiver and all of the RT protocol logic.
The Monitor (MT) protocol of the BU-61559 monitors both 1553
buses. For each word received from either bus, both the 16 bits
of word data plus a 16-bit Identification Word (“Tag” Word) are
stored in the AIM-HY'er memory space.
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