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參數(shù)資料
| 型號(hào)： | BU-61865G3-320S |
| 廠商： | DATA DEVICE CORP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
| 封裝： | 25.40 X 25.40 MM, 2.54 MM HEIGHT, CERAMIC, QFP-72 |
| 文件頁(yè)數(shù)： | 1/60頁(yè) |
| 文件大?。?/td> | 457K |
| 代理商： | BU-61865G3-320S |
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Data Device Corporation
105 Wilbur Place
Bohemia, New York 11716
631-567-5600 Fax: 631-567-7358
www.ddc-web.com
FOR MORE INFORMATION CONTACT:
Technical Support:
1-800-DDC-5757 ext. 7234
FEATURES
Fully Integrated 1553A/B Notice 2,
McAir, STANAG 3838 Interface Terminal
Compatible with Mini-ACE (Plus)
and ACE Generations
Choice of :
- RT or BC/RT/MT In Same Footprint
- RT or BC/RT/MT with 4K RAM
- BC/RT/MT with 64K RAM, and RAM
parity
Choice of 5V or 3.3V Logic
Package Options:
- 1" Square Ceramic Flat Pack or
Gull Wing
- 0.815" Square BGA (-ACE)
5V Transceiver with 1760 and McAir
Compatible Options
Comprehensive Built-In Self-Test
Flexible Processor/Memory Interface,
with Reduced Host Wait Time
Choice of 10, 12, 16, or 20 MHz Clock
Highly Autonomous BC with
Built-In Message Sequence Control:
- Frame Scheduling
- Branching
- Asynchronous Message Insertion
- General Purpose Queue
- User-defined Interrupts
Advanced RT Functions
- Global Circular Buffering
- Interrupt Status Queue
- 50% Circular Buffer Rollover
Interrupts
Selective Message Monitor
- Selection by Address, T/R Bit,
Subaddress
- Command and Data Stacks
- 50% and 100% Stack Rollover
Interrupts
DESCRIPTION
The Enhanced Miniature Advanced Communications Engine (Enhanced
Mini-ACE) and -ACE (Micro-ACE) family of MIL-STD-1553 terminals pro-
vide complete interfaces between a host processor and a 1553 bus, and
integrate dual transceiver, protocol logic, and 4K or 64K words of RAM.
At 0.815" square, the -ACE (BGA package) option provides the
smallest footprint in the industry.
The terminals are powered by a choice of 5V or 3.3V logic.
Multiprotocol support of MIL-STD-1553A/B and STANAG 3838, includ-
ing versions incorporating McAir compatible transmitters, is provided.
There is a choice of 10, 12, 16, or 20 MHz clocks. The BC/RT/MT ver-
sions with 64K words of RAM include built-in RAM parity checking.
BC features include a built-in message sequence control engine, with
a set of 20 instructions. This feature provides an autonomous means
of implementing multi-frame message scheduling, message retry
schemes, data double buffering, asynchronous message insertion,
and reporting to the host CPU. The Enhanced Mini-ACE/-ACE incor-
porates a fully autonomous built-in self-test, providing comprehensive
testing of the internal protocol logic and/or RAM.
The RT offers the same choices of subaddress buffering as the ACE
and Mini-ACE (Plus), along with a global circular buffering option,
50% rollover interrupt for circular buffers, an interrupt status queue,
and an "Auto-boot" option to support MIL-STD-1760.
The terminals provide the same flexibility in host interface configura-
tions as the ACE/Mini-ACE, along with a reduction in the host proces-
sor's worst case holdoff time. Most software features are compatible
with the previous generations of the Mini-ACE (Plus) and ACE series.
2000 Data Device Corporation
BU-6174X/6184X/6186X
ENHANCED MINIATURE ADVANCED
COMMUNICATIONS ENGINE
[ENHANCED MINI-ACE/-ACE (MICRO-ACE)]
Make sure the next
Card you purchase
has...
-ACE
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