- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄255880 > BU-61843F3-142Q (DATA DEVICE CORP) 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 PDF資料下載
參數(shù)資料
| 型號： | BU-61843F3-142Q |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
| 封裝： | 25.40 X 25.40 MM, 3.94 MM HEIGHT, CERAMIC, FP-72 |
| 文件頁數(shù)： | 26/60頁 |
| 文件大?。?/td> | 457K |
| 代理商： | BU-61843F3-142Q |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當(dāng)前第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁
32
Data Device Corporation
www.ddc-web.com
BU-6174X/6184X/6186X
F-10/02-300
MISCELLANEOUS
CLOCK INPUT
The Enhanced Mini-ACE/-ACE decoder is capable of operating
from a 10, 12, 16, or 20 MHz clock input. Depending on the con-
figuration of the specific model Enhanced Mini-ACE/-ACE ter-
minal, the selection of the clock input frequency may be chosen
by one of either two methods. For all versions, the clock fre-
quency may be specified by means of the host processor writing
to Configuration Register #6. With the second method, which is
applicable only for the versions incorporating 4K (but not 64K)
words of internal RAM, the clock frequency may be specified by
means of the input signals that are otherwise used as the A15
and A14 address lines.
ENCODER/DECODERS
For the selected clock frequency, there is internal logic to derive
the necessary clocks for the Manchester encoder and decoders.
For all clock frequencies, the decoders sample the receiver out-
puts on both edges of the input clock. By in effect doubling the
decoders' sampling frequency, this serves to widen the tolerance
to zero-crossing distortion, and reduce the bit error rate.
For interfacing to fiber optic transceivers (e.g., for MIL-STD-1773
applications), the decoders are capable of operating with single-
ended, rather than double-ended, input signals. For applications
involving the use of single-ended transceivers, it is suggested
that you contact the factory at DDC regarding a transceiverless
version of the Enhanced Mini-ACE.
SELECTIVE MESSAGE MONITOR MEMORY
ORGANIZATION
A typical memory map for the Enhanced Mini-ACE/-ACE in the
Selective Message Monitor mode, assuming a 4K RAM space, is
illustrated in TABLE 45. This mode of operation defines several
fixed locations in the RAM. These locations are allocated in a
way in which none of them overlap with the fixed RT locations.
This allows for the combined RT/Selective Message Monitor
mode.
The fixed memory map consists of two Monitor Command Stack
Pointers (locations 102 and 106 hex), two Monitor Data Stack
Pointers (locations 103 and 107 hex), and a Selective Message
Monitor Lookup Table (locations 0280 through 02FF hex).
For this example, the Monitor Command Stack size is assumed
to be 1K words, and the Monitor Data Stack size is assumed to
be 2K words.
FIGURE 11 illustrates the Selective Message Monitor operation.
Upon receipt of a valid Command Word, the Enhanced Mini-
ACE/-ACE will reference the Selective Monitor Lookup Table to
determine if the current command is enabled. If the current com-
mand is disabled, the Enhanced Mini-ACE/-ACE monitor will
ignore (and not store) the current message. If the command is
enabled, the monitor will create an entry in the Monitor
Command Stack at the address location referenced by the
Monitor Command Stack Pointer, and an entry in the monitor
data stack starting at the location referenced by the Monitor Data
Stack Pointer.
The format of the information in the data stack depends on the
format of the message that was processed. For example, for a
BC-to-RT transfer (receive command), the monitor will store the
command word in the monitor command descriptor stack, with
the data words and the receiving RT's status word stored in the
monitor data stack.
The size of the monitor command stack is programmable, with
choices of 256, 1K, 4K, or 16K words. The monitor data stack
size is programmable with choices of 512, 1K, 2K, 4K, 8K, 16K,
32K or 64K words.
Monitor Command Stack Pointer B (fixed location)
Monitor Data Stack A
0800-0FFF
Monitor Command Stack A
0400-07FF
Not Used
0300-03FF
Selective Monitor Lookup Table (fixed location)
0280-02FF
Not Used
0108-027F
Monitor Data Stack Pointer B (fixed location)
0107
Not Used
0104-0105
Monitor Data Stack Pointer A (fixed location)
0103
Monitor Command Stack Pointer A (fixed location)
0102
Not Used
0000-0101
DESCRIPTION
ADDRESS
(HEX)
0106
TABLE 45. TYPICAL SELECTIVE MESSAGE
MONITOR MEMORY MAP (shown for 4K RAM for
“Monitor only” mode)
MONITOR INTERRUPTS
Selective monitor interrupts may be issued for End-of-message
and for conditions relating to the monitor command stack point-
er and monitor data stack pointer. The latter, which are shown in
FIGURE 9, include Command Stack 50% Rollover, Command
Stack 100% Rollover, Data Stack 50% Rollover, and Data Stack
100% Rollover.
The 50% rollover interrupts may be used to inform the host proces-
sor when the command stack or data stack is half full. At that time,
the host may proceed to read the received messages in the upper
half of the respective stack, while the Enhanced Mini-ACE/-ACE
monitor writes messages to the lower half of the stack. Later, when
the monitor issues a 100% stack rollover interrupt, the host can pro-
ceed to read the received data from the lower half of the stack,
while the Enhanced Mini-ACE/-ACE monitor continues to write
received data words to the upper half of the stack.
INTERRUPT STATUS QUEUE
Like the Enhanced Mini-ACE/-ACE RT, the Selective Monitor
mode includes the capability for generating an interrupt status
queue. As illustrated in FIGURE 10, this provides a chronologi-
cal history of interrupt generating events. Besides the two
Interrupt Mask Registers, the Interrupt Status Queue provides
additional filtering capability, such that only valid messages
and/or only invalid messages may result in entries to the
Interrupt Status Queue. The interrupt status queue is 64 words
deep, providing the capability to store entries for up to 32 moni-
tored messages.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BU-61843F3-150S | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
| BU-61843F3-150W | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
| BU-61843F3-152W | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
| BU-61843F3-152Y | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
| BU-61843F3-152Z | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BU-61843F4-100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| BU-61843F4-110 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| BU-61843G3-100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| BU-61843G3-110 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| BU-61843G4-100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。