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Data Device Corporation
www.ddc-web.com
BU-61703/61705
D1 web-09/02-0
FIGURE 9. DMA WRITE TRANSFER (BURST-MODE) TIMING
CLOCK IN
DTREQ
DTGRT
DTACK
MEMWR
MEMOE
WC/MC/CWC
D15-D0
DATA VALID
t1
t2
t6
t5
t4
t8
t11
t12
t13
t7
t11
t12
t13
t15
t3
t10
t14
t16
t10
t14
t19
t20
t17
L-BRO, T/R,
SA4-SA0
VALID
GBR
INCMD
CWC = 0
CWC = 1
WC
t18
t21
t9
DMA WRITE - BURST MODE
(SHOWN FOR TWO DATA WORDS)
1
INCMD rising edge is shown for the case of a RX Broadcast command message.
For the non-Broadcast case, INCMD rising edge is after the Mid-Parity crossing of the RT STATUS response.
1