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參數(shù)資料
| 型號： | BU-61590D5-140W |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP78 |
| 封裝： | 2.100 X 1.800 INCH, 0.210 INCH HEIGHT, DIP-78 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 78K |
| 代理商： | BU-61590D5-140W |
DESCRIPTION
DDC's
BU-61590
BC/RT/MT
Universal Advanced Communication
Engine (ACE) terminal comprises a
complete integrated interface between
a host processor and a MIL-STD-
1553, STANAG 3838, or McAir bus.
The BU-61590 integrates a dual uni-
versal McAir transceiver, protocol,
memory management and processor
interface logic, and 4K words of inter-
nal buffered RAM in either a 78-pin
DIP or flat pack package.
This dual universal transceiver provides
a sinusoidal waveform for full compli-
ance with 1553A, 1553B, and McAir
A3818, A5232, and A5690 standards.
To minimize board space and "glue"
logic, the Universal ACE terminals
provide the ultimate flexibility in inter-
facing to a host processor and inter-
nal/external RAM.
The BU-61590 provides complete
multiprotocol support of MIL-STD-
1553A, 1553B Notice 2, McAir A3818,
A5232,
and
A5690,
General
Dynamics
16PP303,
Grumman
SPG151A, and STANAG 3838 (includ-
ing EFAbus). The advanced functional
architecture of the ACE terminals pro-
vides software compatibility to DDC's
previous AIM series hybrids. In addi-
tion, the ACE Terminals incorporate a
multiplicity of architectural enhance-
ments allowing flexible operation while
off-loading the host processor, ensur-
ing data consistency, and supporting
bulk data transfers.
The BU-61590 may be operated at
either 12 or 16 MHz. Options allow for
a hardwired or programmable RT
address.
The BU-61590 operates over the full
military temperature range of -55 to
+125°C. Available screened to MIL-
PRF-38534, the terminals are ideal
for demanding military and industrial
processor-to-1553 applications.
FEATURES
Fully Integrated Terminal
Dual Universal Transceiver
Satisfies McAir and 1553A/B
Multiprotocol Supports:
MIL-STD-1553A and B Notice 2
McAir A3818, A5232, & A5690
General Dynamics 16PP303
(F16) Grumman SPG151A
4K x 16 Internal RAM
Flexible Processor/Memory
Interface
Automatic BC Retries
Programmable BC Gap Times
BC Frame Auto-Repeat
Flexible RT Data Buffering
Programmable Illegalization
Selective Message Monitor
Simultaneous RT/Monitor Mode
TRANSCEIVER
A
CH. A
TRANSCEIVER
B
CH. B
DUAL
ENCODER/DECODER,
MULTIPROTOCOL
AND
MEMORY
MANAGEMENT
RT ADDRESS
4K X 16
SHARED
RAM
ADDRESS BUS
PROCESSOR
AND
MEMORY
INTERFACE
LOGIC
DATA BUS
D15-D0
A15-A0
DATA
BUFFERS
ADDRESS
BUFFERS
PROCESSOR
DATA BUS
PROCESSOR
ADDRESS BUS
MISCELLANEOUS
INCMD
CLK_IN, TAG_CLK, BC/MT_ENA, TX_INH_A, TX_INH_B,
MSTCLR, SSFLAG/EXT_TRG, ILLEGAL, RT_AD_LAT
RTAD4-RTAD0, RTADP
TRANSPARENT/BUFFERED, STRBD, SELECT,
RD/WR, MEM/REG, TRIGGER_SEL/MEMENA-IN,
MSB/LSB/DTGRT, INT_ACK
IOEN, MEMENA-OUT, READYD
ADDR_LAT/MEMOE, ZERO_WAIT/MEMWR,
8/16-BIT/DTREQ, POLARITY_SEL/DTACK
INT
PROCESSOR
AND
MEMORY
CONTROL
INTERRUPT
REQUEST
TX/RX_A
TX/RX_B
BU-61590 BLOCK DIAGRAM
BU-61590
MIL-STD-1553A/B AND McAIR BC/RT/MT,
ADVANCED COMMUNICATION ENGINE (ACE)
1994, 1999 Data Device Corporation
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