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參數(shù)資料
| 型號： | BU-61588P0-410Z |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CPGA81 |
| 封裝： | 1 X 1 INCH, LOW PROFILE, CERAMIC, PGA-81 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 141K |
| 代理商： | BU-61588P0-410Z |
DESCRIPTION
The
BU-61588
Mini-ACE
and
BU-61688 Mini-ACE Plus* integrates
two 5-volt-only transceivers, protocol,
memory
management,
processor
interface logic, and 4K x 16, or 64K x
16* words of RAM in a choice of pin
grid array (PGA), quad flat pack or gull
lead packages. The Mini-ACE is pack-
aged in a 1.0 square inch, low profile,
cofired
ceramic
multi-chip-module
(MCM) package making it the smallest
integrated MIL-STD-1553 BC/RT/MT
in the industry.
The Mini-ACE provides full compatibil-
ity to DDC’s BU-61580 and BU-65170
Advanced
Communication
Engine
(ACE). As such, the Mini-ACE includes
all the hardware and software archi-
tectural features of the ACE.
The
Mini-ACE
contains
internal
address latches and bidirectional data
buffers to provide a direct interface to
a host processor bus.
The memory management scheme for
RT mode provides three data struc-
tures for buffering data. These struc-
tures, combined with the Mini-ACE’s
extensive interrupt capability, serve to
ensure data consistency while off-
loading the host processor.
The Mini-ACE Plus* can optionally
boot-up as a RT with the Busy bit set
for 1760 applications.
The Mini-ACE BC mode implements
several features aimed at providing an
efficient real-time software interface to
the host processor including automatic
retries, programmable intermessage
gap times, automatic frame repetition,
and flexible interrupt generation.
The advanced architectural features of
the Mini-ACE, combined with its small
size and high reliability, make it an ideal
choice for demanding military and indus-
trial processor-to-1553 applications.
FEATURES
5 Volt Only
Fully Integrated
MIL-STD-1553 A/B
STANAG 3838 Compliant Terminals
One-Square-Inch Package
Smallest BC/RT/MT In The Industry
Hardware and Software Compatible
with BU-61580 ACE Series
Flexible Processor/Memory Interface
Bootable RT* Option
4K x 16 or 64K x 16* Shared RAM
Automatic BC Retries
Programmable BC Gap Times
Programmable Illegalization
Simultaneous RT/Monitor Mode
Operates From 10*/12 /16 / 20* MHz Clock
TRANSCEIVER
A
CH. A
TRANSCEIVER
B
CH. B
DUAL
ENCODER/DECODER,
MULTIPROTOCOL
AND
MEMORY
MANAGEMENT
RT ADDRESS
4K X 16
OR
64K X 16
*
SHARED
RAM
ADDRESS BUS
PROCESSOR
AND
MEMORY
INTERFACE
LOGIC
DATA BUS
D15-D0
A15-A0
DATA
BUFFERS
ADDRESS
BUFFERS
PROCESSOR
DATA BUS
PROCESSOR
ADDRESS BUS
MISCELLANEOUS
CLK_IN,
MSTCLR,SSFLAG/EXT_TRG
RTAD4-RTAD0, RTADP
IOEN, READYD
ADDR_LAT/MEMOE, ZERO_WAIT/MEMWR,
8/16-BIT/DTREQ, POLARITY_SEL/DTACK
INT
TRANSPARENT/BUFFERED, STRBD, SELECT,
RD/WR, MEM/REG, TRIGGER_SEL/MEMENA-IN,
MSB/LSB/DTGRT
PROCESSOR
AND
MEMORY
CONTROL
INTERRUPT
REQUEST
TX/RX_A
TX/RX_B
RT_AD_LAT
1996, 1999 Data Device Corporation
FIGURE 1. BU-65178 / 65179* /61588 /61688*/61689* BLOCK DIAGRAM
BU-65178 /65179*/61588 /61688*/61689*
MINIATURE ADVANCED COMMUNICATION ENGINE
(MINI-ACE) and MINI-ACE PLUS*
Ref
er to
ACE
Datasheet
and
ACE
User’
s Guide
for ad
ditional
inf
o.
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