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| 型號(hào)： | BU-61581V1-130Y |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP70 |
| 封裝： | 1.900 X 1 INCH, 0.150 INCH HEIGHT, LOW PROFILE, CERAMIC, FP-70 |
| 文件頁數(shù)： | 7/44頁 |
| 文件大?。?/td> | 298K |
| 代理商： | BU-61581V1-130Y |
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address; (2) after a circular buffer rollover. An additional table in
RAM may be used to enable interrupts following selected mode
code messages.
When using the circular buffer scheme for a given subaddress,
the size of the circular buffer is programmable by three bits of the
Subaddress Control Word (see TABLE 28). The options for cir-
cular buffer size are 128, 256, 512, 1024, 2048, 4096, and 8192
Data Words.
SINGLE MESSAGE MODE
FIGURE 5 illustrates the RT Single Message memory manage-
ment scheme. When operating the BU-65170/61580 in its “AIM-
HY” (default) mode, the Single Message scheme is implemented
for all transmit, receive, and broadcast subaddresses. In the
Single Message mode (also in the Double Buffer and Circular
Buffer modes), there is a global double buffering scheme, con-
trolled by bit 13 of Configuration Register #1. This selects from
between the two sets of the various data structures shown in the
figure: the Stack Pointers (fixed addresses), Descriptor Stacks
(user defined addresses), RT Lookup Tables (fixed addresses),
and RT Data Word blocks (user defined addresses). FIGURES
27, 28, and 29 delineate the “active” and “nonactive” areas by the
nonshaded and shaded areas, respectively.
As shown, the ACE stores the Command Word from each mes-
sage received, in the fourth location within the message descrip-
tor (in the stack) for the respective message. The T/R bit, subad-
dress field, and (optionally) broadcast/own address, index into
the active area Lookup Table, to locate the data block pointer for
the current message. The BU-65170/61580 RT memory man-
agement logic then accesses the data block pointer to locate the
starting address for the Data Word block for the current mes-
sage. The maximum size for an RT Data Word block is 32 words.
For a particular subaddress in the Single Message mode, there
is overwriting of the contents of the data blocks for receive/broad-
cast subaddresses — or overreading, for transmit subaddresses.
In the single message mode, it is possible to access multiple
data blocks for the same subaddress. This, however, requires the
intervention of the host processor to update the respective
Lookup Table pointer.
To implement a data wraparound subaddress, as required by
Notice 2 of MIL-STD-1553B, the Single Message scheme should
be used for the wraparound subaddress. Notice 2 recommends
subaddress 30 as the wraparound subaddress.
CIRCULAR BUFFER MODE
FIGURE 6 illustrates the RT circular buffer memory management
scheme. The circular buffer mode facilitates bulk data transfers.
The size of the RT circular buffer, shown on the right side of the
figure, is programmable from 128 to 8192 words (in even powers
of 2) by the respective Subaddress Control Word. As in the sin-
gle message mode, the host processor initially loads the individ-
ual Lookup Table entries. At the start of each message, the ACE
stores the Lookup Table entry in the third position of the respec-
tive message block descriptor in the stack area of RAM, as in the
Single Message mode. The ACE transfers Receive or Transmit
Data Words to (from) the circular buffer, starting at the location
referenced by the Lookup Table pointer.
At the end of a valid (or optionally invalid) message, the value of
the Lookup Table entry updates to the next location after the last
address accessed for the current message. As a result, Data
Words for the next message directed to the same Tx/RX(/Bcst)
subaddress will be accessed from the next contiguous block of
address locations within the circular buffer. As a recommended
option, the Lookup Table pointers may be programmed to not
update following an invalid receive (or broadcast) message. This
allows the 1553 bus controller to retry the failed message, result-
ing in the valid (retried) data overwriting the invalid data. This
eliminates overhead for the RT's host processor. When the point-
er reaches the lower boundary of the circular buffer (located at
128, 256, . . . 8192-word boundaries in the BU-65170/61580
address space), the pointer moves to the top boundary of the cir-
cular buffer, as FIGURE 6 shows.
Implementing Bulk Data Transfers
The use of the Circular Buffer scheme is ideal for bulk data trans-
fers; that is, multiple messages to/from the same subaddress.
The recommendation for such applications is to enable the cir-
cular buffer interrupt request. By so doing, the routine transfer of
multiple messages to the selected subaddress, including errors
and retries, is transparent to the RT's host processor. By strate-
gically initializing the subaddresses' Lookup Table pointer prior to
the start of the bulk transfer, the BU-65170/61580 may be con-
figured to issue an interrupt request only after it has received the
anticipated number of valid Data Words to the designated sub-
address.
SUBADDRESS DOUBLE BUFFERING MODE
For receive (and broadcast) subaddresses, the BU-65170/61580
RT offers a third memory management option, Subaddress
Double Buffering. Subaddress Double Buffering provides a
means of ensuring data consistency. FIGURE 70 illustrates the
RT Subaddress Double Buffering scheme. Like the Single
Message and Circular Buffer modes, the Double Buffering mode
may be selected on a subaddress basis by means of the
Subaddress Control Word. The purpose of the Double Buffering
mode is to provide the host processor a convenient means of
accessing the most recent, valid data received to a given subad-
dress. This serves to ensure the highest possible degree of data
consistency by allocating two 32-bit Data Word blocks for each
individual receive (and/or broadcast) subaddress.
At a given point in time, one of the two blocks will be designated
as the “active” 1553 data block while the other will be designat-
ed as the “inactive” block. The Data Words from the next receive
message to that subaddress will be stored in the “active” block.
Upon completion of the message, provided that the message
was valid and Subaddress Double Buffering is enabled, the BU-
65170/61580 will automatically switch the “active” and “inactive”
blocks for the respective subaddress. The ACE accomplishes
this by toggling bit 5 of the subaddress's Lookup Table Pointer
and rewriting the pointer. As a result, the most recent valid block
of received Data Words will always be readily accessible to the
host processor.
As a means of ensuring data consistency, the host processor is
able to reliably access the most recent valid, received Data Word
block by performing the following sequence:
15
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| BU-61581V2-120L | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP70 |
| BU-61581V2-120S | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP70 |
| BU-61581V6-140Z | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP70 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| BU-61581V1-200 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553/ARINC Bus Controller/RTU |
| BU-61581V1-300 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553/ARINC Bus Controller/RTU |
| BU-61581V2-100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553/ARINC Bus Controller/RTU |
| BU-61581V2-110 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553/ARINC Bus Controller/RTU |
| BU-61581V2-120 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553/ARINC Bus Controller/RTU |
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