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| 型號： | BU-61580V6-320 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP70 |
| 封裝： | 48.30 X 25.40 MM, 3.81 MM HEIGHT, FP-70 |
| 文件頁數(shù)： | 31/44頁 |
| 文件大?。?/td> | 563K |
| 代理商： | BU-61580V6-320 |
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37
Data Device Corporation
www.ddc-web.com
BU-65170/61580/61585
H1 web-09/02-0
TABLE 33. SIGNAL DESCRIPTIONS FOR BU-65170/61571, BU-61580/61585, BU-61586
(G, S or V PACKAGE) (CONTINUED)
MISCELLANEOUS (7)
Option for BU-65170/61580X6 and the BU-61585X6. Inhibits (disables) the respective (A/B) MIL-STD-1553 transmitter
when asserted to logic “1.”
36
70
TX_INH_A (I)
External Time Tag Clock input. Use may be designated by bits 7, 8, and 9 of Configuration Register #2. When used it incre-
ments the internal Time Tag Register/Counter. If not used, should be connected to +5V or ground.
63
TAG_CLK (I)
27
SSFLAG (I)/
EXT_TRIG (I)
45
INCMD (O)
Master Clear. Negative true Reset input, normally asserted low following power turn-on. Requires a minimum 100ns nega-
tive pulse to reset all internal logic to its “power turn-on” state.
7
MSTCLR (I)
16MHz (or 12MHz) clock input.
19
CLOCK IN (I)
DESCRIPTION
PIN
SIGNAL NAME
In Command. In BC mode, asserted low throughout processing cycle for each message. In RT mode or Message Monitor
mode, asserted low following receipt of Command Word and kept low until completion of current message sequence. In
Word Monitor mode, goes low following MONITOR START command, kept low while monitor is on-line, goes high following
RESET command.
Subsystem Flag or External Trigger input. In the Remote Terminal mode, asserting this input , will set the Subsystem Flag
bit in the BU-65170/61580's RT Status Word. A low on the SSFLAG input overrides a logic “1" of the respective bit (bit 8) of
Configuration Register #1. In the Bus Controller mode, an enabled external BC Start option (bit 7 of Configuration Register
#1) and a low-to-high transition on this input will issue a BC Start command, starting execution of the current BC frame. In
the Word Monitor mode, an enabled external trigger (bit 7 of Configuration Register #1) and a low-to-high transition on this
input will issue a monitor trigger.
TX_INH_B (I)
POWER AND GROUND (8)
-15(-12)VB
CH. B Transceiver Ground
37
GNDB
CH. B +5V Supply
38
CH. B -15V(-12V) Supply*
36
+5VB
CH. A Transceiver Ground
69
GNDA
CH. A +5V Supply
68
+5VA
CH. A -15V(-12V) Supply*
70
-15(-12)VA
Logic Ground
18
LOGIC GND
Logic +5V Supply
54
+5V LOGIC
DESCRIPTION
PIN
SIGNAL NAME
RT ADDRESS (6)
RTADP (I)
44
39
RTAD0 (LSB) (I)
40
RTAD1 (I)
Remote Terminal Address Inputs
41
RTAD2 (I)
42
RTAD3 (I)
43
RTAD4 (MSB) (I)
DESCRIPTION
PIN
SIGNAL NAME
1553 ISOLATION TRANSFORMER INTERFACE (4)
Analog Transmit/Receive Input/Outputs. Connect directly to 1553 isolation transformers.
35
TX/RX-B (I/O)
34
TX/RX-B (I/O)
2
TX/RX-A (I/O)
1
TX/RX-A (I/O)
DESCRIPTION
PIN
SIGNAL NAME
NOTE: * No Connects (N/Cs) for BU-65170/61580 and TX_INH input for BU-65170/61580X6.
Remote Terminal Address Parity. Must provide odd parity sum with RTAD4-RTAD0 in order for the RT to respond to non-
broadcast commands.
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PDF描述 |
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| BU-61580V6-520S | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP70 |
| BU-61580V6-800Z | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP70 |
| BU-61580V6-800 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP70 |
| BU-61585G0-220Y | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDSO70 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BU-61581 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553 Components |ACE |
| BU61581F6-300 | 制造商:DDC 功能描述:61581F6-300 |
| BU-61581G1-100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553/ARINC Bus Controller/RTU |
| BU-61581G1-110 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553/ARINC Bus Controller/RTU |
| BU-61581G1-120 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553/ARINC Bus Controller/RTU |
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