參數(shù)資料
型號(hào): BT458LPJ125
英文描述: Video DAC with Color Palette (RAMDAC)
中文描述: 視頻DAC的調(diào)色板(的RAMDAC)
文件頁數(shù): 40/60頁
文件大?。?/td> 647K
代理商: BT458LPJ125
4.0 Application Information
Bt457/Bt458
4.5 Initializing the Bt457 (Monochrome)
125 MHz/135 MHz/165 MHz Monolithic CMOS 256 Color Palette RAMDAC
4-8
Conexant
L45801 Rev. N
4.5 Initializing the Bt457 (Monochrome)
Following a power-on sequence, the Bt457 must be initialized. If the clock/LD*
sequence is controlled to reset the pipeline delay of the Bt457 to a fixed pipeline
delay of eight clock cycles, this initialization sequence must be performed after
the reset sequence. The command register must also be reinitialized when the
multiplex selection changes (e.g., from 4:1 to 5:1 input multiplexing).
This sequence configures the Bt457 as follows:
4:1 Multiplexed Operation
No Overlays
No Blinking
Color data written/read every cycle
Control Register Initialization
Write $04 to address register
Write $FF to read mask register
Write $05 to address register
Write $00 to blink mask register
Write $06 to address register
Write $40 to command register
Write $07 to address register
Write $00 to test register
Color Palette RAM Initialization
Write $00 to address register
Write data to RAM (location $00)
Write data to RAM (location $01)
:
Write data to RAM (location $FF)
Overlay Color Palette Initialization
Write $00 to address register
Write data to overlay (location $00)
Write data to overlay (location $01)
:
Write data to overlay (location $03)
C1,C0
00
10
00
10
00
10
00
10
00
01
01
:
01
00
11
11
:
11
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