參數(shù)資料
型號(hào): BQ71501DCKR
英文描述: VOLT REGULATOR|ADJUSTABLE|+1.2V TO +15V|CMOS|TSSOP|6PIN|PLASTIC
中文描述: 電壓調(diào)節(jié)器|調(diào)節(jié)| 1.2V至15V的|的CMOS | TSSOP封裝| 6針|塑料
文件頁(yè)數(shù): 7/13頁(yè)
文件大小: 225K
代理商: BQ71501DCKR
TPS71525
TPS71533
TPS71501
SLVS338C
MAY 2001
REVISED APRIL 2002
7
www.ti.com
APPLICATION INFORMATION
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125
°
C; restrict the maximum junction
temperature to 125
°
C under normal operating conditions. This restriction limits the power dissipation the
regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
D(max)
, and the actual dissipation, P
D
, which must be less than
or equal to P
D(max)
.
The maximum-power-dissipation limit is determined using the following equation:
PD(max)
TJmax
TA
RJA
Where:
T
J
max
is the maximum allowable junction temperature.
R
θ
JA
is the thermal resistance junction-to-ambient for the package (see the Dissipation Rating Table).
T
A
is the ambient temperature.
The regulator dissipation is calculated using:
PD
VI
VO
IO
Power dissipation resulting from quiescent current is negligible.
regulator protection
The TPS715xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might
be appropriate.
The TPS715xx features internal current limiting. During normal operation, the TPS715xx limits output current
to approximately 500 mA. When current limiting engages, the output voltage scales back linearly until the
overcurrent condition ends. Take care not to exceed the power dissipation ratings of the package.
programming the TPS71501 adjustable LDO regulator
The output voltage of the TPS71501 adjustable regulator is programmed using an external resistor divider as
shown in Figure 14. The output voltage is calculated using:
VO
Vref
1
R1
R2
(3)
Where:
V
ref
= TBD V typ (the internal reference voltage)
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