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參數資料
| 型號： | BQ4845S-A4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | XO, clock |
| 英文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封裝： | 0.300 INCH, GREEN, SOIC-28 |
| 文件頁數： | 5/24頁 |
| 文件大?。?/td> | 1287K |
| 代理商： | BQ4845S-A4 |
13
Read Cycle (TA =TOPR, VCCmin ≤ VCC ≤ VCCmax)
Symbol
Parameter
Min.
Max.
Unit
Conditions
tRC
Read cycle time
70
-
ns
tAA
Address access time
-
70
ns
Output load A
tACS
Chip select access time
-
70
ns
Output load A
tOE
Output enable to output valid
-
35
ns
Output load A
tCLZ
Chip select to output in low Z
5
-
ns
Output load B
tOLZ
Output enable to output in low Z
0
-
ns
Output load B
tCHZ
Chip deselect to output in high Z
0
25
ns
Output load B
tOHZ
Output disable to output in high Z
0
25
ns
Output load B
tOH
Output hold from address change
10
-
ns
Output load A
Write Cycle (TA =TOPR , VCCmin ≤ VCC ≤ VCCmax)
Symbol
Parameter
Min.
Max.
Unit
Conditions
tWC
Write cycle time
70
-
ns
tCW
Chip select to end of write
65
-
ns
(1)
tAW
Address valid to end of write
65
-
ns
(1)
tAS
Address setup time
0
-
ns
Measured from address valid to beginning
of write. (2)
tWP
Write pulse width
55
-
ns
Measured from beginning of write to end of
write. (1)
tWR1
Write recovery time (write cycle 1)
5
-
ns
Measured from WE going high to end of
write cycle. (3)
tWR2
Write recovery time (write cycle 2)
15
-
ns
Measured from CS going high to end of
write cycle. (3)
tDW
Data valid to end of write
30
-
ns
Measured to first low-to-high transition of
either CS or WE.
tDH1
Data hold time (write cycle 1)
0
-
ns
Measured from WE going high to end of
write cycle. (4)
tDH2
Data hold time (write cycle 2)
10
-
ns
Measured from CS going high to end of
write cycle. (4)
tWZ
Write enabled to output in high Z
0
25
ns
I/O pins are in output state. (5)
tOW
Output active from end of write
0
-
ns
I/O pins are in output state. (5)
Notes:
1.
A write ends at the earlier transition of CS going high and WE going high.
2.
A write occurs during the overlap of a low CS and a low WE. A write begins at the later transition
of CS going low and WE going low.
3.
Either tWR1 or tWR2 must be met.
4.
Either tDH1 or tDH2 must be met.
5.
If CS goes low simultaneously with WE going low or after WE going low, the outputs remain in
high-impedance state.
Aug. 1995
bq4845/bq4845Y
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相關代理商/技術參數 |
參數描述 |
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| BQ4845S-A4G4 | 功能描述:實時時鐘 w/NVSRAM Control Watchdog Timer RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| BQ4845S-A4N | 功能描述:實時時鐘 w/NVSRAM Control Watchdog Timer RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| BQ4845S-A4NG4 | 功能描述:實時時鐘 w/NVSRAM Control Watchdog Timer RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| BQ4845S-A4NTR | 功能描述:實時時鐘 w/NVSRAM Control Watchdog Timer RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| BQ4845S-A4NTRG4 | 功能描述:實時時鐘 w/NVSRAM Control Watchdog Timer RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
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