參數(shù)資料
型號： BH16952DGG
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： RES, 5.1, 1/4W, TKF, 5%, 1210
中文描述： ABT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝： TSSOP-56
文件頁數(shù)： 7/12頁
文件大小： 87K
代理商： BH16952DGG
Philips Semiconductors
Product specification
74ABT16952
74ABTH16952
16-bit registered transceiver (3-State)
1998 Feb 25
7
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
°
C
T
amb
= –40
°
C
to +85
°
C
MIN
UNIT
MIN
TYP
–0.9
2.9
3.4
2.4
0.42
0.13
MAX
–1.2
MAX
–1.2
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
V
CC
= 5.5V; I
OL
= 1mA; V
I
= GND or V
CC
V
V
V
V
V
V
2.5
3.0
2.0
2.5
3.0
2.0
V
OH
High-level output voltage
V
OL
V
RST
Low-level output voltage
Power-up output low voltage
3
Input leakage
current
0.55
0.55
0.55
0.55
I
I
Control pins
V
CC
= 5.5V; V
I
= GND or 5.5V
±
0.01
±
1.0
±
1.0
μ
A
Bus Hold current A inputs
6
74ABTH16952
V
CC
= 4.5V, V
I
= 0.8V
V
CC
= 4.5V; V
I
= 2.0V
V
CC
= 5.5V; V
I
= 0 to 5.5V
V
CC
= 0V; V
O
or V
I
≤
4.5V
V
CC
= 2.1V; V
O
= 0.0V; V
I
= GND or V
CC
;
V
OE
= Don’t care
V
CC
= 5.5V; V
O
= 5.5V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 0.0V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
cc
V
CC
= 5.5V; V
O
= 2.5V
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs 3-State;
V
I
CC
V
CC
= 5.5V; one input at 3.4V,
other inputs at V
CC
or GND
V
CC
= 5.5V; one input at 3.4V,
other inputs at V
CC
or GND
50
–75
±
500
50
–75
I
HOLD
μ
A
I
OFF
Power-off leakage current
Power-up/down 3-State
output current
4
3-State output High current
3-State output Low current
Output High leakage current
Output current
1
±
5.0
±
100
±
100
μ
A
I
PU/PD
±
5.0
±
50
±
50
μ
A
I
IH
+ I
OZH
I
IL
+ I
OZL
I
CEX
I
O
I
CCH
I
CCL
5.0
–5.0
5.0
–70
0.5
8
50
–50
50
–180
1.5
19
50
–50
50
–180
1.5
19
μ
A
μ
A
μ
A
mA
mA
mA
–50
–50
Quiescent supply current
I
CCZ
0.5
1.5
1.5
mA
I
CC
Additional supply current per
input pin
2
74ABT16952
Additional supply current per
input pin
2
74ABTH16952
5
100
100
μ
A
I
CC
100
500
500
μ
A
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V
CC
between 0V and 2.1V with a transition time of up to 10msec. From V
CC
= 2.1V to V
CC
= 5V
±
10% a
transition time of up to 100
μ
sec is permitted.
5. Unused pins at V
CC
or GND.
6. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
°
C
V
CC
= +5.0V
TYP
T
amb
= –40
°
C to +85
°
C
CC
= +5.0V
±
0.5V
MIN
150
1.0
1.0
1.0
1.0
1.7
1.3
UNIT
MIN
150
1.0
1.0
1.0
1.0
1.7
1.3
MAX
MAX
f
MAX
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Maximum clock frequency
Propagation delay
nCPBA to nAx, nCPAB to nBx
Output enable time
nOEBA to nAx, nOEAB to nBx
Output disable time
nOEBA to nAx, nOEAB to nBx
1
MHz
1
2.8
2.3
2.5
2.2
3.4
2.6
3.9
3.9
3.8
3.8
4.4
3.9
4.3
4.3
4.6
4.6
5.2
4.2
ns
3
4
3
4
ns
ns
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